Memory system and information processing system

    公开(公告)号:US12175110B2

    公开(公告)日:2024-12-24

    申请号:US18509572

    申请日:2023-11-15

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a controller. The controller manages validity of data in the non-volatile memory using a data map. The data map includes first fragment tables. Each of the first fragment tables stores first and second information. The first information indicates the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second information indicates the validity of a plurality of data having a predetermined size in each of entries. The controller selects a write destination block based on a size of write data to be written to the non-volatile memory by a write command from a host.

    Memory system and information processing system

    公开(公告)号:US11861197B2

    公开(公告)日:2024-01-02

    申请号:US17643611

    申请日:2021-12-10

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a controller. The controller manages validity of data in the non-volatile memory using a data map. The data map includes first fragment tables. Each of the first fragment tables stores first and second information. The first information indicates the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second information indicates the validity of a plurality of data having a predetermined size in each of entries. The controller selects a write destination block based on a size of write data to be written to the non-volatile memory by a write command from a host.

    Storage device and storage system

    公开(公告)号:US11972110B2

    公开(公告)日:2024-04-30

    申请号:US17931363

    申请日:2022-09-12

    CPC classification number: G06F3/0613 G06F3/0659 G06F3/0679

    Abstract: According to one embodiment, in response to receiving, from a host, one or more second type commands, a controller of the storage device maintains the received one or more second type commands in a memory region in the storage device without completing processing of the received one or more second type commands. In response to receiving the first type command from the host, the controller completes processing of a second type command, and transmits a command completion response for the first type command to the host as a first preceding response for the first type command. In response to completion of processing of the first type command, the controller transmits a command completion response for the first type command to the host.

    Memory system and information processing system

    公开(公告)号:US11775424B2

    公开(公告)日:2023-10-03

    申请号:US17345438

    申请日:2021-06-11

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a data map configured to manage validity of data written in the non-volatile memory. The data map includes a plurality of first fragment tables corresponding to a first hierarchy and a second fragment table corresponding to a second hierarchy higher than the first hierarchy. Each of the first fragment tables is used to manage the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second fragment table is used for each of the first fragment tables to manage reference destination information for referencing the first fragment table.

    Memory system including nonvolatile memory and method of controlling the same

    公开(公告)号:US12210450B2

    公开(公告)日:2025-01-28

    申请号:US18463396

    申请日:2023-09-08

    Abstract: According to one embodiment, in response to restoration of power to a memory system, a controller in the memory system notifies a host that the memory system is ready. When an input/output command specifying a logical address belonging to a logical address range is received, the controller selects a block corresponding to the logical address range and rebuilds, based on address translation information and an update log which are stored in the selected block, the latest address translation information corresponding to the logical address range. The controller updates the rebuilt latest address translation information, based on a list of logical addresses corresponding to lost write data, stored in the selected block.

    Managing superblock writes using data transfer lists

    公开(公告)号:US12079499B2

    公开(公告)日:2024-09-03

    申请号:US17898394

    申请日:2022-08-29

    CPC classification number: G06F3/064 G06F3/0607 G06F3/0656 G06F3/0679

    Abstract: A memory system includes a volatile memory, a nonvolatile memory, and a controller. The controller is configured to set a block group of the nonvolatile memory to be in a writable state and generate in the volatile memory a list associated with the block group. The controller is configured to, with respect to a write command, add an entry to the list, which includes a first address of a host and a second address of the volatile memory, obtain the write data from the first address of the host and store the write data in the second address of the volatile memory, write the write data stored at the second address of the volatile memory into the block group, and upon the block group being fully written, set the block group to be in a non-writable state and dissociate the list from the block group.

    Memory system and method of controlling nonvolatile memory

    公开(公告)号:US12236106B2

    公开(公告)日:2025-02-25

    申请号:US17941388

    申请日:2022-09-09

    Abstract: According to one embodiment, a controller of a memory system writes, in response to receiving from the host a write command specifying a logical address, data received from the host to a first write destination block. The controller manages a first list and first storage location information, the first list including a plurality of logical addresses corresponding respectively to write-uncompleted data, and the first storage location information indicating a storage location at a beginning of a write-uncompleted region in the first write destination block. In a case where a power loss has occurred without notice from the host, the controller writes the first list and the first storage location information to the nonvolatile memory using power from a capacitor.

    Memory system and information processing system

    公开(公告)号:US12222857B2

    公开(公告)日:2025-02-11

    申请号:US18457672

    申请日:2023-08-29

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a data map configured to manage validity of data written in the non-volatile memory. The data map includes a plurality of first fragment tables corresponding to a first hierarchy and a second fragment table corresponding to a second hierarchy higher than the first hierarchy. Each of the first fragment tables is used to manage the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second fragment table is used for each of the first fragment tables to manage reference destination information for referencing the first fragment table.

    Method for improving trim command response time

    公开(公告)号:US11669264B2

    公开(公告)日:2023-06-06

    申请号:US17201004

    申请日:2021-03-15

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a controller. The non-volatile memory is configured to store an address translation table and a data map. In a case where an invalidation command for invalidating the data written in the non-volatile memory is received from the host, the controller is configured to update the address translation table and the data map based on the invalidation command. A response to the invalidation command is transmitted to the host after the address translation table is updated and before the data map is updated.

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