Method for demodulating a carrier wave modulated by a digital symbol sequence
    1.
    发明授权
    Method for demodulating a carrier wave modulated by a digital symbol sequence 有权
    用于解调由数字符号序列调制的载波的方法

    公开(公告)号:US06603824B1

    公开(公告)日:2003-08-05

    申请号:US09673066

    申请日:2000-11-30

    IPC分类号: H04L2706

    CPC分类号: H04L25/069 H04L27/2332

    摘要: A method for demodulating a carrier wave that is modulated using a digital symbol sequence and that is transmitted over a noise-impacted channel, the ideal edge shapes of possible transitions between two symbols being known and stored in memory as reference edges, and a received edge being scanned and digitalized using a scanning frequency that is a multiple of the frequency of the symbol sequence. In particular, for detecting a received and scanned edge, all scanning values are used for calculating Euclidean distances from at least two reference edges, and the reference edge associated with the lowest Euclidean distance is selected. A Viterbi algorithm is applied to a sequence of estimated edges (rather than to an estimated symbol sequence) and the specific Euclidean distances between the edge received in one symbol period and the reference edges are considered as the costs of one trellis branch of the Viterbi algorithm.

    摘要翻译: 一种用于解调使用数字符号序列调制并且在受噪声影响的信道上发送的载波的方法,已知并存储在存储器中的两个符号之间的可能转换的理想边缘形状作为参考边缘,以及接收边缘 使用扫描频率进行扫描和数字化,扫描频率是符号序列的频率的倍数。 特别地,为了检测接收和扫描的边缘,所有扫描值被用于从至少两个参考边缘计算欧氏距离,并且选择与最低欧几里德距离相关联的参考边缘。 维特比算法被应用于估计边缘的序列(而不是估计的符号序列),并且在一个符号周期中接收的边缘与参考边缘之间的特定欧几里德距离被认为是维特比算法的一个网格分支的成本 。

    Channel error correction apparatus and method
    2.
    发明授权
    Channel error correction apparatus and method 有权
    通道纠错装置及方法

    公开(公告)号:US06526532B1

    公开(公告)日:2003-02-25

    申请号:US09434319

    申请日:1999-11-04

    IPC分类号: G01R3128

    CPC分类号: H04N19/63 H04N19/65 H04N19/89

    摘要: To provide an approach to correction of residual errors in subband-based transmission schemes there is provided a channel error correction apparatus with a first synthesis unit for synthesizing a preliminary output signal from subband signals received via a transmission channel. A subband correcting is achieved through a subband reanalysis unit analyzing the preliminary output signal through subband filtering without downsampling, an error estimation unit estimating errors in subband reanalysis output signals using subband specific error patterns, and an error compensation unit correcting the subband signals using error estimation results. A second synthesis unit then synthesizes a final output signal from output signals of the error compensation unit.

    摘要翻译: 为了提供基于子带的传输方案中的残余误差校正方法,提供了一种具有第一合成单元的信道纠错装置,用于从经由传输信道接收的子带信号合成初步输出信号。 通过子带再分析单元通过子带滤波分析初级输出信号而不进行下采样来实现子带校正,误差估计单元使用子带特定误差模式估计子带再分析输出信号中的误差,以及使用误差估计校正子带信号的误差补偿单元 结果。 然后,第二合成单元从误差补偿单元的输出信号合成最终的输出信号。

    SMART CARD MODULE
    5.
    发明申请
    SMART CARD MODULE 审中-公开
    智能卡模块

    公开(公告)号:US20070138301A1

    公开(公告)日:2007-06-21

    申请号:US11549778

    申请日:2006-10-16

    申请人: Kalman Cinkler

    发明人: Kalman Cinkler

    IPC分类号: G06K19/06 G06K7/06

    CPC分类号: G06K19/07743 G06K19/07733

    摘要: A smart card module including first and second card contacts positioned within a boundary line. Each first card contact has one of a plurality of regions, wherein the size of each region conforms to the ISO 7816 card contact standard and conforms with regard to its distance from and its arrangement with respect to one of the other regions to the ISO standard 7816. One of the second card contacts is arranged between at least one of the first card contacts and the boundary line or includes a part of one of the regions. The card contacts include a contact surface and at least one chip arranged on a side opposite the contact surface. The chip includes chip contacts, at least one of which is electrically connected to the card contacts.

    摘要翻译: 智能卡模块,包括位于边界线内的第一和第二卡片触点。 每个第一卡片接触件具有多个区域中的一个,其中每个区域的尺寸符合ISO 7816卡接触标准,并且与其相对于ISO标准7816的其它区域之一的距离及其布置是一致的 第二卡片触点中的一个布置在第一卡片触点和边界线中的至少一个之间,或者包括其中一个区域的一部分。 卡触点包括接触表面和布置在与接触表面相对的一侧上的至少一个芯片。 芯片包括芯片触点,其中至少一个电连接到卡触点。

    Apparatus for detecting connection of a peripheral unit to a host system
    8.
    发明申请
    Apparatus for detecting connection of a peripheral unit to a host system 审中-公开
    用于检测外围单元与主机系统的连接的装置

    公开(公告)号:US20060015670A1

    公开(公告)日:2006-01-19

    申请号:US11169157

    申请日:2005-06-27

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4081

    摘要: An apparatus and method for detecting a connection of a peripheral unit to a host system via a data transmission interface, wherein the host system includes at least one switching device which sets a connection between at least one data line of the data transmission interface and a prescribed potential in the host system.

    摘要翻译: 一种用于经由数据传输接口检测外围单元与主机系统的连接的装置和方法,其中所述主机系统包括至少一个交换设备,其将所述数据传输接口的至少一个数据线与规定的 在主机系统中的潜力。