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公开(公告)号：US08772786B2
公开(公告)日：2014-07-08
申请号：US13548305
申请日：2012-07-13
IPC分类号： H01L29/15 , H01L31/0256
CPC分类号： H01L29/66462 , H01L29/0657 , H01L29/0843 , H01L29/2003 , H01L29/201 , H01L29/7787 , H01L29/7789
摘要： A semiconductor structure having mesa structure comprising: a lower semiconductor layer; an upper semiconductor layer having a higher band gap than, and in direct contact with, the lower semiconductor layer to form a two-dimension electron gas (2DEG) region between the upper semiconductor layer. The 2DEG region has outer edges terminating at sidewalls of the mesa. An additional electron donor layer has a band gap higher than the band gap of the lower layer disposed on sidewall portions of the mesa structure and on the region of the 2DEG region terminating at sidewalls of the mesa. An ohmic contact material is disposed on the electron donor layer. In effect, a sideway HEMT is formed with the electron donor layer, the 2DEG region and the ohmic contact material increasing the concentration of electrons (i.e., lowering ohmic contact résistance) all along the contact between the lower semiconductor layer and the electron donor layer.
摘要翻译： 一种具有台面结构的半导体结构，包括：下半导体层; 上半导体层具有比下半导体层更高的带隙并且与下半导体层直接接触以在上半导体层之间形成二维电子气（2DEG）区。 2DEG区域具有终止于台面侧壁的外边缘。 另外的电子供体层具有高于设置在台面结构的侧壁部分上的下层的带隙和在台面的侧壁处终止的2DEG区域的区域的带隙。 欧姆接触材料设置在电子供体层上。 实际上，沿着下半导体层和电子供体层之间的接触，电子供体层，2DEG区和欧姆接触材料形成侧向HEMT增加电子的浓度（即降低欧姆接触电阻）。
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公开(公告)号：US20140014966A1
公开(公告)日：2014-01-16
申请号：US13548305
申请日：2012-07-13
IPC分类号： H01L29/20 , H01L29/778
CPC分类号： H01L29/66462 , H01L29/0657 , H01L29/0843 , H01L29/2003 , H01L29/201 , H01L29/7787 , H01L29/7789
摘要： A semiconductor structure having mesa structure comprising: a lower semiconductor layer; an upper semiconductor layer having a higher band gap than, and in direct contact with, the lower semiconductor layer to form a two-dimension electron gas (2DEG) region between the upper semiconductor layer. The 2DEG region has outer edges terminating at sidewalls of the mesa. An additional electron donor layer has a band gap higher than the band gap of the lower layer disposed on sidewall portions of the mesa structure and on the region of the 2DEG region terminating at sidewalls of the mesa. An ohmic contact material is disposed on the electron donor layer. In effect, a sideway HEMT is formed with the electron donor layer, the 2DEG region and the ohmic contact material increasing the concentration of electrons (i.e., lowering ohmic contact resistance) all along the contact between the lower semiconductor layer and the electron donor layer.
摘要翻译： 一种具有台面结构的半导体结构，包括：下半导体层; 上半导体层具有比下半导体层更高的带隙并且与下半导体层直接接触以在上半导体层之间形成二维电子气（2DEG）区。 2DEG区域具有终止于台面侧壁的外边缘。 另外的电子供体层具有高于设置在台面结构的侧壁部分上的下层的带隙和在台面的侧壁处终止的2DEG区域的区域的带隙。 欧姆接触材料设置在电子供体层上。 实际上，沿着下半导体层和电子供体层之间的接触，形成有电子供体层，2DEG区和欧姆接触材料增加电子浓度（即降低欧姆接触电阻）的侧面HEMT。
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公开(公告)号：US09293379B2
公开(公告)日：2016-03-22
申请号：US12553249
申请日：2009-09-03
IPC分类号： H01L29/66 , H01L21/8252 , H01L21/311 , H01L27/06
CPC分类号： H01L21/8252 , H01L21/31111 , H01L27/0605
摘要： A method for forming a structure on a surface of a semiconductor. The method includes: forming the material as a lower layer of the structure using a first deposition process to provide the lower layer with a first etch rate to a predetermined etchant; forming the upper layer of the structure with the material on the lower using a second deposition process to provide the upper layer with a second etch rate to the predetermined etchant higher than the first etch rate; and applying the predetermined etchant to upper layer to selectively remove the upper while leaving the lower layer.
摘要翻译： 一种在半导体表面上形成结构的方法。 该方法包括：使用第一沉积工艺将所述材料形成为所述结构的下层，以向所述下层提供预定蚀刻剂的第一蚀刻速率; 使用第二沉积工艺在所述下部材料上形成所述结构的上层，以向所述上层提供比所述第一蚀刻速率高的所述预定蚀刻剂的第二蚀刻速率; 并将预定的蚀刻剂施加到上层，以选择性地移除上部，同时离开下层。
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公开(公告)号：US20110049581A1
公开(公告)日：2011-03-03
申请号：US12553249
申请日：2009-09-03
IPC分类号： H01L27/06 , H01L21/302 , H01L21/02 , H01L29/38 , H01L21/31
CPC分类号： H01L21/8252 , H01L21/31111 , H01L27/0605
摘要： A method for forming a structure on a surface of a semiconductor. The method includes: forming the material as a lower layer of the structure using a first deposition process to provide the lower layer with a first etch rate to a predetermined etchant; forming the upper layer of the structure with the material on the lower using a second deposition process to provide the upper layer with a second etch rate to the predetermined etchant higher than the first etch rate; and applying the predetermined etchant to upper layer to selectively remove the upper while leaving the lower layer.
摘要翻译： 一种在半导体表面上形成结构的方法。 该方法包括：使用第一沉积工艺将所述材料形成为所述结构的下层，以向所述下层提供预定蚀刻剂的第一蚀刻速率; 使用第二沉积工艺在所述下部材料上形成所述结构的上层，以向所述上层提供比所述第一蚀刻速率高的所述预定蚀刻剂的第二蚀刻速率; 并将预定的蚀刻剂施加到上层，以选择性地移除上部，同时离开下层。
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5.发明申请SEMICONDUCTOR STRUCTURE HAVING PLURAL BACK-BARRIER LAYERS FOR IMPROVED CARRIER CONFINEMENT 审中-公开具有改进的载波限制的多个反向障碍层的半导体结构公开(公告)号：US20080258135A1
公开(公告)日：2008-10-23
申请号：US11737217
申请日：2007-04-19
IPC分类号： H01L29/205
CPC分类号： H01L29/7783 , H01L29/2003 , H01L29/201 , H01L29/205
摘要： A semiconductor structure having: a channel layer having a conductive channel therein; a pair of polarization generating layers; a spacer layer disposed between the pair of polarization generating layers. The polarization generating layers create polarization fields along a common, predetermined direction. Each one of the pair of polarizations layers may be InGaN; InAlGaN; or quaternary InxAlyGa1-x-yN and x is greater than or equal to y/2. The polarization generating layers create polarization fields along a common, predetermined direction constructively increasing the total polarization fields experienced by the channel layer to increase confinement of carriers in the conductive channel.
摘要翻译： 一种半导体结构，具有：沟道层，其中具有导电沟道; 一对偏光产生层; 间隔层，设置在该对偏振产生层之间。 极化产生层沿共同的预定方向产生极化场。 该对偏振层中的每一个可以是InGaN; InAlGaN; 或四分之一以上的Al x Y y和x大于或等于y / 2。 极化产生层沿着共同的预定方向产生偏振场，从而建构性地增加由沟道层所经历的总偏振场，以增加导电沟道中载流子的约束。
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