Hybrid memory architecture for reduced state sequence estimation (RSSE) techniques

    公开(公告)号:US20060039492A1

    公开(公告)日:2006-02-23

    申请号:US11256182

    申请日:2005-10-21

    IPC分类号: H04L23/02

    摘要: A method and apparatus are disclosed for improving the processing time of reduced complexity sequence estimation techniques, such as reduced state sequence estimation (RSSE). The possible values for the branch metrics in the RSSE are precomputed to permit pipelining and the shortening of the critical path. The computational load of the precomputations is reduced for multi-dimensional trellis codes by precomputing each dimension of the multi-dimensional trellis code separately. Prefiltering techniques are used to reduce the computational complexity by shortening the channel memory. A hybrid survivor memory architecture is disclosed for RSSE for a channel having a channel memory of length L, where the survivors corresponding to the L past decoding cycles are stored in a register exchange architecture, and survivors corresponding to later decoding cycles are stored in a trace-back architecture (TBA) or register exchange architecture (REA). Symbols are mapped to information bits to reduce the word size before being moved from the first register exchange architecture to the trace-back architecture (TBA) or the second register exchange architecture.

    Method and apparatus for pipelined joint equalization and decoding for gigabit communications
    2.
    发明申请
    Method and apparatus for pipelined joint equalization and decoding for gigabit communications 有权
    用于千兆通信的流水线联合均衡和解码的方法和装置

    公开(公告)号:US20060020877A1

    公开(公告)日:2006-01-26

    申请号:US11234446

    申请日:2005-09-26

    IPC分类号: H03M13/03

    摘要: A method and apparatus for the implementation of reduced state sequence estimation is disclosed, with an increased throughput using precomputation (look-ahead), with only a linear increase in hardware complexity with respect to the look-ahead depth. The present invention limits the increase in hardware complexity by taking advantage of past decisions (or survivor symbols). The critical path of a conventional RSSE implementation is broken up into at least two smaller critical paths using pipeline registers. Various reduced state sequence estimation implementations are disclosed that employ one-step or multiple-step look-ahead techniques to process a signal received from a dispersive channel having a channel memory.

    摘要翻译: 公开了一种用于实现简化状态序列估计的方法和装置,其中使用预先计算(先行)的增加的吞吐量相对于先行深度仅具有线性增加的硬件复杂度。 本发明通过利用过去的决定(或幸存者符号)来限制硬件复杂度的增加。 常规RSSE实现的关键路径使用流水线寄存器分解为至少两个较小的关键路径。 公开了各种缩减状态序列估计实现,其采用一步或多步先行技术来处理从具有通道存储器的色散通道接收的信号。

    Digital signal processor having instruction set with a logarithm function using reduced look-up table
    3.
    发明授权
    Digital signal processor having instruction set with a logarithm function using reduced look-up table 有权
    数字信号处理器具有使用缩减查找表的对数函数的指令集

    公开(公告)号:US09170776B2

    公开(公告)日:2015-10-27

    申请号:US12362899

    申请日:2009-01-30

    IPC分类号: G06F1/035 G06F7/556 G06F1/03

    摘要: A digital signal processor is provided having an instruction set with a logarithm function that uses a reduced look-up table. The disclosed digital signal processor evaluates a logarithm function for an input value, x, by decomposing the input value, x, to a first part, N, a second part, q, and a remaining part, r, wherein the first part, N, is identified by a position of a most significant bit of the input value, x, and the second part, q, is comprised of a number of bits following the most significant bit, wherein the number is small relative to a number of bits in the input value, x; obtaining a value Log 2 ⁡ ( 1 + 1 2 ⁢ q ) from a first look-up table based on the second part, q; computing an epsilon term, ε, using the expression 2 - N 1 + 1 2 ⁢ q ⁢ r ; evaluating an expression Log2 (1+ε) using a polynomial approximation, such as a cubic approximation; and determining the logarithm function for the input value, x, by summing the values of N, Log Z ⁡ ( 1 + 1 2 ⁢ q ) and Log2(1+ε).

    摘要翻译: 提供一种数字信号处理器,其具有使用缩减的查找表的具有对数函数的指令集。 所公开的数字信号处理器通过将输入值x分解为第一部分N,第二部分q和剩余部分r来评估输入值x的对数函数,其中第一部分N 由输入值x的最高有效位的位置识别,第二部分q由最高有效位之后的位数组成,其中该数目相对于位数 输入值x; 基于第二部分从第一查找表获得值Log 2⁡(1 + 1 2 q)q; 使用表达式2-N 1 + 1 2 q r;计算ε项,&egr; 使用诸如立方近似的多项式近似来评估表达式Log2(1 +&egr;); 并且通过将N,Log Z⁡(1 + 1 2 q)和Log2(1 +&egr))的值求和来确定输入值x的对数函数。

    Multi-dimensional hybrid and transpose form finite impulse response filters
    4.
    发明授权
    Multi-dimensional hybrid and transpose form finite impulse response filters 有权
    多维混合和转置形式有限脉冲响应滤波器

    公开(公告)号:US08799341B2

    公开(公告)日:2014-08-05

    申请号:US11781313

    申请日:2007-07-23

    申请人: Kameran Azadet

    发明人: Kameran Azadet

    IPC分类号: G06F17/10

    摘要: Multi-dimensional finite impulse response filters ale disclosed in hybrid and transpose forms. Multi-dimensional signals can be expressed in a vector (ox matrix) form to allow multi-dimensional signals to be processed collectively. Known hybrid and transpose FIR filters are extended to the multi-dimensional case to allow multi-dimensional signals to be processed with reduced redundancies. The input signals are vectors with multidimensional components. The disclosed FIR filters include multipliers that perform matrix multiplications with multiple coefficients, and adders for performing vector additions with multiple inputs and outputs. The z-transforms are provided for the disclosed hybrid and transpose multi-dimensional FIR filters.

    摘要翻译: 混合和转置形式中公开的多维有限脉冲响应滤波器。 多维信号可以以向量(ox矩阵)形式表示,以允许集体处理多维信号。 已知的混合和转置FIR滤波器被扩展到多维情况,以允许以减少的冗余来处理多维信号。 输入信号是具有多维分量的向量。 所公开的FIR滤波器包括执行具有多个系数的矩阵乘法的乘法器和用于执行具有多个输入和输出的矢量加法的加法器。 为所公开的混合和转置多维FIR滤波器提供z变换。

    Method and apparatus for joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations
    5.
    发明授权
    Method and apparatus for joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations 有权
    用于在多个符号持续时间内传输的多维码的联合均衡和解码的方法和装置

    公开(公告)号:US08635516B2

    公开(公告)日:2014-01-21

    申请号:US13302707

    申请日:2011-11-22

    IPC分类号: H03M13/03

    摘要: A method and apparatus are disclosed for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. An RSSE scheme is disclosed that cancels the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. The disclosed RSSE technique for multidimensional codes applies where the number of trellis code dimensions exceeds the number of channels. The disclosed RSSE decoder computes the intersymbol interference caused by previously decoded multidimensional code symbols and subtracts the intersymbol interference from the received signal. In addition, a branch metrics unit compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol.

    摘要翻译: 公开了一种用于执行在多个符号持续时间上发送的多维码的联合均衡和解码的方法和装置。 公开了一种RSSE方案,其消除由同一多维码符号内的其他符号分量引起的内部符号干扰。 所披露的用于多维码的RSSE技术适用于网格码数量超过信道数量的地方。 所公开的RSSE解码器计算由先前解码的多维码符号引起的符号间干扰,并从接收信号中减去符号间干扰。 此外,分支度量单元补偿由相同的多维码符号内的其他符号分量引起的内部符号干扰。

    METHODS AND APPARATUS FOR SEARCH SPHERE LINEAR BLOCK DECODING
    6.
    发明申请
    METHODS AND APPARATUS FOR SEARCH SPHERE LINEAR BLOCK DECODING 有权
    用于搜索球形线性块解码的方法和装置

    公开(公告)号:US20130080855A1

    公开(公告)日:2013-03-28

    申请号:US13247439

    申请日:2011-09-28

    IPC分类号: H03M13/13 G06F11/10

    摘要: A search sphere-based linear block decoder is provided. A received vector, v, is decoded by computing a syndrome vector, S, corresponding to the received vector, v; (S=vH); obtaining a set of all possible error vectors, e, corresponding to the computed syndrome vector, S, wherein the set of all possible error vectors, e, is obtained from a pre-computed error table and has a specified maximum number of bit errors; calculating a set of all possible received vectors, x, based on the received vector, v, and the set of all possible error vectors, e; determining a k-bit code-vector x that is closest to the received vector, v; and determining an n-bit data-vector, d, associated with the k-bit code-vector x. The pre-computed error table can be generated by multiplying all possible error vectors by a Syndrome Matrix, to obtain all possible syndrome vectors associated with all possible error vectors.

    摘要翻译: 提供基于搜索范围的线性块解码器。 通过计算对应于接收向量v的校正子向量S来解码接收向量v, (S = vH); 获得对应于所计算的校正子向量S的所有可能的误差向量集合,其中所有可能的误差向量集合e从预先计算的误差表获得并且具有指定的最大数量的比特错误; 基于所接收的向量v和所有可能的误差向量的集合e来计算所有可能的接收向量x的集合; 确定最接近接收矢量的k位码矢量,v; 以及确定与所述k位码矢量x相关联的n位数据矢量d。 可以通过将所有可能的误差向量乘以综合征矩阵来产生预计算误差表,以获得与所有可能的误差向量相关联的所有可能的校正子向量。

    Method and Apparatus for Cross-Talk Cancellation in Frequency Division Multiplexed Transmission Systems
    7.
    发明申请
    Method and Apparatus for Cross-Talk Cancellation in Frequency Division Multiplexed Transmission Systems 审中-公开
    频分复用传输系统中交叉对讲取消方法与装置

    公开(公告)号:US20120106316A1

    公开(公告)日:2012-05-03

    申请号:US13348851

    申请日:2012-01-12

    申请人: Kameran Azadet

    发明人: Kameran Azadet

    IPC分类号: H04J1/12

    CPC分类号: H04J1/12 H04J14/0298 H04L5/06

    摘要: A method and apparatus are disclosed for canceling cross-talk in a frequency-division multiplexed communication system. The disclosed frequency-division multiplexed communication system employs multiple carriers having overlapping channels and provides an improved cross-talk cancellation mechanism to address the resulting interference. Bandwidth compression is achieved using n level amplitude modulation in each frequency band. An FDM receiver is also disclosed that decomposes the received broadband signal into each of its respective frequency bands and returns the signal to baseband in the analog domain. Analog requirements are relaxed by removing cross-talk from adjacent RF channels, from image bands, and minimizing the performance degradation caused by In-phase and Quadrature-phase (I/Q) phase and gain mismatches in modulators and demodulators. The disclosed transmitter or receiver (or both) can be fabricated on a single integrated circuit.

    摘要翻译: 公开了用于在频分复用通信系统中消除串扰的方法和装置。 所公开的频分复用通信系统采用具有重叠信道的多个载波,并且提供改进的串扰消除机制来解决所产生的干扰。 在每个频带中使用n级幅度调制实现带宽压缩。 还公开了一种FDM接收机,其将接收的宽带信号分解成其各自的频带,并将该信号返回到模拟域中的基带。 通过从图像频带中消除相邻RF信道的串扰,并将调制器和解调器中的同相和正交相(I / Q)相位和增益失配引起的性能下降最小化,从而放宽模拟要求。 公开的发射器或接收器(或两者)可以在单个集成电路上制造。

    Method and apparatus for joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations
    8.
    发明授权
    Method and apparatus for joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations 有权
    用于在多个符号持续时间内传输的多维码的联合均衡和解码的方法和装置

    公开(公告)号:US08095857B2

    公开(公告)日:2012-01-10

    申请号:US10022665

    申请日:2001-12-18

    IPC分类号: H03M13/03

    摘要: A method and apparatus are disclosed for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. An RSSE scheme is disclosed that cancels the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. The disclosed RSSE technique for multidimensional codes applies where the number of trellis code dimensions exceeds the number of channels. The disclosed RSSE decoder computes the intersymbol interference caused by previously decoded multidimensional code symbols. In addition, a branch metrics unit compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. In addition, the disclosed RSSE decoder compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol.

    摘要翻译: 公开了一种用于执行在多个符号持续时间上发送的多维码的联合均衡和解码的方法和装置。 公开了一种RSSE方案,其消除由同一多维码符号内的其他符号分量引起的内部符号干扰。 所披露的用于多维码的RSSE技术适用于网格码数量超过信道数量的地方。 所公开的RSSE解码器计算由先前解码的多维码符号引起的符号间干扰。 此外,分支度量单元补偿由相同的多维码符号内的其他符号分量引起的内部符号干扰。 另外,所公开的RSSE解码器补偿由相同的多维码符号内的其他符号分量引起的内部符号干扰。

    METHODS AND APPARATUS FOR WIRELESS CHANNEL ESTIMATION USING INTERPOLATION ELIMINATION IN THE EIGEN DOMAIN
    9.
    发明申请
    METHODS AND APPARATUS FOR WIRELESS CHANNEL ESTIMATION USING INTERPOLATION ELIMINATION IN THE EIGEN DOMAIN 有权
    用于在EIGEN域中使用插值消除的无线信道估计的方法和装置

    公开(公告)号:US20110051867A1

    公开(公告)日:2011-03-03

    申请号:US12547298

    申请日:2009-08-25

    IPC分类号: H04B1/10

    摘要: Methods and apparatus are provided for wireless channel estimation using interpolation elimination in the Eigen domain. Channel components at known OFDM symbol locations are interpolated to other OFDM symbol locations. Methods and apparatus are provided for interpolating in the Eigen domain between reference signals (i.e., training signals) to estimate the equalizer coefficients with a reduced complexity. In particular, one aspect of the present invention performs the required interpolation before a required matrix inversion in the Eigen domain.

    摘要翻译: 提供了在本征域中使用内插消除的无线信道估计的方法和装置。 已知OFDM符号位置处的信道分量被内插到其他OFDM符号位置。 提供了用于在参考信号(即,训练信号)之间的本征域内插入以降低复杂度来估计均衡器系数的方法和装置。 特别地,本发明的一个方面在本征域中的所需矩阵求逆之前执行所需的插值。

    UPLINK CHANNEL ESTIMATION
    10.
    发明申请
    UPLINK CHANNEL ESTIMATION 有权
    上行通道估计

    公开(公告)号:US20100197264A1

    公开(公告)日:2010-08-05

    申请号:US12365444

    申请日:2009-02-04

    IPC分类号: H04B1/06

    摘要: In one embodiment, a receiver is provided for use in a multiple-input system that includes a receiving antenna receiving a time-domain signal corresponding to a plurality of signals transmitted from a plurality of transmitting antennas. The receiver includes: (a) a transform unit adapted to transform the time-domain signal into a frequency-domain signal; (b) a channel estimation unit adapted to estimate, based on the frequency-domain signal and a frequency-domain pilot signal, a combined transfer function corresponding to a plurality of transfer functions of respective channels between the plurality of transmitting antennas and the receiving antenna; and (c) a channel separation unit including a plurality of frequency-domain convolution units that separate the combined transfer function into a plurality of estimated channel transfer functions.

    摘要翻译: 在一个实施例中,提供接收机用于多输入系统,该多输入系统包括接收天线,其接收与从多个发射天线发射的多个信号相对应的时域信号。 接收机包括:(a)适于将时域信号变换为频域信号的变换单元; (b)信道估计单元,适于基于频域信号和频域导频信号估计与多个发射天线和接收天线之间的各个信道的多个传递函数相对应的组合传递函数 ; 以及(c)信道分离单元,其包括将所述组合传递函数分离成多个估计信道传递函数的多个频域卷积单元。