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公开(公告)号：US07312661B2
公开(公告)日：2007-12-25
申请号：US11204051
申请日：2005-08-16
IPC分类号： H03F3/04
CPC分类号： H03F1/302 , H03F1/30 , H03F3/04 , H03F3/211 , H03F3/3432
摘要： A bias current to be supplied to an amplification circuit 60 is drawn out of a collector of a transistor Q11 of a bias circuit 10. The drawn-out bias current is input to a base of a transistor Q13 via an attenuation filter F2 and is output from an emitter of the transistor Q13 in the state where the voltage thereof is reduced by a level corresponding to Vbe. The attenuation filter F2 is conducted in a DC manner, and attenuates a component of a frequency fH(=2ft−fr) defined by a transmission frequency ft and a receiving frequency fr of a radio frequency signal. The bias current output from the emitter of the transistor Q13 is supplied to the amplification circuit 60 via an attenuation filter F1. The attenuation filter F1 is conducted in a DC manner, and attenuates a component of a frequency fL(=|fr−ft|).
摘要翻译： 将要提供给放大电路60的偏置电流从偏置电路10的晶体管Q 11的集电极引出。 引出偏置电流经由衰减滤波器F 2输入到晶体管Q13的基极，并且在其电压降低到对应于Vbe的电平的状态下从晶体管Q 13的发射极输出。 衰减滤波器F 2以直流方式传导，并且衰减由射频信号的发送频率ft和接收频率fr定义的频率fH（= 2ft-fr）的分量。 从晶体管Q13的发射极输出的偏置电流通过衰减滤波器F 1被提供给放大电路60。 衰减滤波器F 1以直流方式传导，并衰减频率fL（= | fr-ft |）的分量。
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公开(公告)号：US07425872B2
公开(公告)日：2008-09-16
申请号：US11499650
申请日：2006-08-07
摘要： A bias voltage is applied via a first resistance to the base of a first transistor, and a radio frequency signal is input via a first capacitor to the base of the first transistor. The bias voltage is applied via a second resistance to the base of a second transistor. The bias voltage is applied via a third resistance to the base of a third transistor, and the radio frequency signal RF is input via a third capacitor to the base of the third transistor. A first band rejection filter is provided between the base of the first transistor and the base of the second transistor. A second band rejection filter is provided between the base of the second transistor and the base of the third transistor. The collectors of the first to third transistors are connected in common and the emitters thereof are all grounded.
摘要翻译： 偏置电压通过第一电阻施加到第一晶体管的基极，并且射频信号经由第一电容器输入到第一晶体管的基极。 偏置电压通过第二电阻施加到第二晶体管的基极。 偏置电压通过第三电阻施加到第三晶体管的基极，并且射频信号RF经由第三电容器输入到第三晶体管的基极。 第一带阻滤波器设置在第一晶体管的基极和第二晶体管的基极之间。 第二带阻滤波器设置在第二晶体管的基极和第三晶体管的基极之间。 第一至第三晶体管的集电极共同连接，其发射极全部接地。
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公开(公告)号：US20070096809A1
公开(公告)日：2007-05-03
申请号：US11499650
申请日：2006-08-07
IPC分类号： H03F3/68
摘要： A bias voltage is applied via a first resistance to the base of a first transistor, and a radio frequency signal is input via a first capacitor to the base of the first transistor. The bias voltage is applied via a second resistance to the base of a second transistor. The bias voltage is applied via a third resistance to the base of a third transistor, and the radio frequency signal RF is input via a third capacitor to the base of the third transistor. A first band rejection filter is provided between the base of the first transistor and the base of the second transistor. A second band rejection filter is provided between the base of the second transistor and the base of the third transistor. The collectors of the first to third transistors are connected in common and the emitters thereof are all grounded.
摘要翻译： 偏置电压通过第一电阻施加到第一晶体管的基极，并且射频信号经由第一电容器输入到第一晶体管的基极。 偏置电压通过第二电阻施加到第二晶体管的基极。 偏置电压通过第三电阻施加到第三晶体管的基极，并且射频信号RF经由第三电容器输入到第三晶体管的基极。 第一带阻滤波器设置在第一晶体管的基极和第二晶体管的基极之间。 第二带阻滤波器设置在第二晶体管的基极和第三晶体管的基极之间。 第一至第三晶体管的集电极共同连接，其发射极全部接地。
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公开(公告)号：US20060214733A1
公开(公告)日：2006-09-28
申请号：US11204051
申请日：2005-08-16
IPC分类号： H03F3/04
CPC分类号： H03F1/302 , H03F1/30 , H03F3/04 , H03F3/211 , H03F3/3432
摘要： A bias current to be supplied to an amplification circuit 60 is drawn out of a collector of a transistor Q11 of a bias circuit 10. The drawn-out bias current is input to a base of a transistor Q13 via an attenuation filter F2 and is output from an emitter of the transistor Q13 in the state where the voltage thereof is reduced by a level corresponding to Vbe. The attenuation filter F2 is conducted in a DC manner, and attenuates a component of a frequency fH(=2ft−fr) defined by a transmission frequency ft and a receiving frequency fr of a radio frequency signal. The bias current output from the emitter of the transistor Q13 is supplied to the amplification circuit 60 via an attenuation filter attenuates a component of a frequency fL(=|fr−ft|).
摘要翻译： 要提供给放大电路60的偏置电流从偏置电路10的晶体管Q 11的集电极引出。所提取的偏置电流经由衰减滤波器F 2输入到晶体管Q 13的基极 并且在其电压降低到对应于Vbe的电平的状态下从晶体管Q 13的发射极输出。 衰减滤波器F 2以直流方式传导，并且衰减由射频信号的发送频率ft和接收频率fr定义的频率fH（= 2ft-fr）的分量。 从晶体管Q13的发射极输出的偏置电流通过衰减滤波器提供给放大电路60，衰减频率fL（= | fr-ft |）的分量。
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5.发明授权High frequency amplifier circuit and mobile communication terminal using the same 失效高频放大器电路和移动通信终端使用相同公开(公告)号：US07924098B2
公开(公告)日：2011-04-12
申请号：US12572346
申请日：2009-10-02
IPC分类号： H03F3/04
CPC分类号： H03G3/3042 , H03F2200/72 , H03G1/007 , H04B2001/0416
摘要： A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
摘要翻译： 第一FET插入到信号输入端和信号输出端之间的串联位置，而第二和第三FET分别插入在信号输入端和接地端之间以及信号输出端与地之间的分流位置 终奌站。 提供第一和第二参考电压端子和控制端子。 第一参考电压和控制电压被施加到第一FET，而第二参考电压和控制电压分别施加到第二和第三FET，使得第一，第二和第三FET用作可变电阻器。 因此，构成增益控制电路。 此外，与第一FET并联提供第一电阻器，而第二和第三电阻器分别与第二和第三FET串联设置。
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6.发明申请High frequency amplifier circuit and mobile communication terminal using the same 失效高频放大器电路和移动通信终端使用相同公开(公告)号：US20050001685A1
公开(公告)日：2005-01-06
申请号：US10880553
申请日：2004-07-01
IPC分类号： H03H7/25 , H03F3/195 , H03G1/00 , H03G3/10 , H03G3/20 , H03G3/30 , H03H11/24 , H04B1/04 , H04B1/3822 , H04B1/40
CPC分类号： H03G3/3042 , H03F2200/72 , H03G1/007 , H04B2001/0416
摘要： A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
摘要翻译： 第一FET插入到信号输入端和信号输出端之间的串联位置，而第二和第三FET分别插入在信号输入端和接地端之间以及信号输出端与地之间的分流位置 终奌站。 提供第一和第二参考电压端子和控制端子。 第一参考电压和控制电压被施加到第一FET，而第二参考电压和控制电压分别施加到第二和第三FET，使得第一，第二和第三FET用作可变电阻器。 因此，构成增益控制电路。 此外，与第一FET并联提供第一电阻器，而第二和第三电阻器分别与第二和第三FET串联设置。
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公开(公告)号：US06188283B1
公开(公告)日：2001-02-13
申请号：US09272326
申请日：1999-03-19
IPC分类号： H03G310
CPC分类号： H03F1/0261 , H03F3/1935 , H03G1/0035 , H03G1/0088
摘要： The present invention relates to an amplifier having high amplification efficiency. Amplification efficiency at low output is improved by reducing current at a latter stage depending on output power at the time when output power is reduced by gain control. In order to accomplish this improvement, gain control voltage applied to a gain control circuit for controlling the gain of a signal-amplifying field-effect transistor in a former stage is also applied simultaneously to a bias voltage control circuit for controlling the voltage between the gate and source of a signal-amplifying field-effect transistor in the latter stage, the voltage between the gate and source of the signal-amplifying field-effect transistor in the latter stage is controlled depending on the gain of the signal-amplifying field-effect transistor in the former stage to control the current between the drain and source of the signal-amplifying field-effect transistor in the latter stage. When the gain of the signal-amplifying field-effect transistor in the former stage is reduced, the current between the drain and source of the signal-amplifying field-effect transistor in the latter stage is reduced, whereby the efficiency of the amplifier is maintained high even when the output is low.
摘要翻译： 本发明涉及具有高放大效率的放大器。 通过在输出功率通过增益控制来降低输出功率时，通过减少后期的电流来提高低输出时的放大效率。 为了实现这种改进，施加到用于控制前级的信号放大场效应晶体管的增益的增益控制电路的增益控制电压也同时施加到用于控制栅极之间的电压的偏置电压控制电路 和后级的信号放大场效应晶体管的源极，后级的信号放大场效应晶体管的栅极和源极之间的电压根据信号放大场效应的增益来控制 晶体管在前一级控制在后级的信号放大场效应晶体管的漏极和源极之间的电流。 当前一级的信号放大场效应晶体管的增益减小时，后级的信号放大场效应晶体管的漏源和源极之间的电流减小，从而保持放大器的效率 即使输出低，也是高电平。
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8.发明授权High frequency amplifier circuit and mobile communication terminal using the same 失效高频放大器电路和移动通信终端使用相同公开(公告)号：US07626459B2
公开(公告)日：2009-12-01
申请号：US11754914
申请日：2007-05-29
IPC分类号： H03F3/04
CPC分类号： H03G3/3042 , H03F2200/72 , H03G1/007 , H04B2001/0416
摘要： A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
摘要翻译： 第一FET插入到信号输入端和信号输出端之间的串联位置，而第二和第三FET分别插入在信号输入端和接地端之间以及信号输出端与地之间的分流位置 终奌站。 提供第一和第二参考电压端子和控制端子。 第一参考电压和控制电压被施加到第一FET，而第二参考电压和控制电压分别施加到第二和第三FET，使得第一，第二和第三FET用作可变电阻器。 因此，构成增益控制电路。 此外，与第一FET并联提供第一电阻器，而第二和第三电阻器分别与第二和第三FET串联设置。
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9.发明授权公开(公告)号：US07340229B2
公开(公告)日：2008-03-04
申请号：US11179598
申请日：2005-07-13
IPC分类号： H04B1/04
CPC分类号： H03G1/007
摘要： A gain control circuit 12 comprises an FET 41 operating as a variable resistor. A gate terminal of the FET 41 is supplied with a control voltage VC applied to a gain control terminal 23. A source terminal and a drain terminal of the FET 41 are supplied with a reference voltage Vref1 obtained by a reference voltage circuit 13. The reference voltage Vref1 is controlled so as to compensate for a variation in the threshold voltage of the FET 41. The resistance value of the FET 41 is changed in accordance with the control voltage VC, and thus the gain of the high frequency amplification circuit 10 is also continuously changed.
摘要翻译： 增益控制电路12包括作为可变电阻器操作的FET 41。 FET 41的栅极端子被提供有施加到增益控制端子23的控制电压VC。 FET 41的源极端子和漏极端子被提供有由参考电压电路13获得的参考电压Vref 1。 控制参考电压Vref 1以便补偿FET41的阈值电压的变化。 FET41的电阻值根据控制电压VC而变化，高频放大电路10的增益也不断变化。
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10.发明授权High frequency amplifier circuit and mobile communication terminal using the same 失效高频放大器电路和移动通信终端使用相同公开(公告)号：US07239205B2
公开(公告)日：2007-07-03
申请号：US10880553
申请日：2004-07-01
IPC分类号： H03K3/04
CPC分类号： H03G3/3042 , H03F2200/72 , H03G1/007 , H04B2001/0416
摘要： A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
摘要翻译： 第一FET插入到信号输入端和信号输出端之间的串联位置，而第二和第三FET分别插入在信号输入端和接地端之间以及信号输出端与地之间的分流位置 终奌站。 提供第一和第二参考电压端子和控制端子。 第一参考电压和控制电压被施加到第一FET，而第二参考电压和控制电压分别施加到第二和第三FET，使得第一，第二和第三FET用作可变电阻器。 因此，构成增益控制电路。 此外，与第一FET并联提供第一电阻器，而第二和第三电阻器分别与第二和第三FET串联设置。
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