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    ATM communication system
    2.
    发明授权
    ATM communication system 失效
    ATM通信系统

    公开(公告)号：US5740158A

    公开(公告)日：1998-04-14

    申请号：US728786

    申请日：1996-10-10

    申请人： Kaoru Aoki ,  Masataka Takano ,  Junichirou Yanagi ,  Tetsushi Nakano ,  Miho Iino

    发明人： Kaoru Aoki ,  Masataka Takano ,  Junichirou Yanagi ,  Tetsushi Nakano ,  Miho Iino

    IPC分类号： H04L12/56 ,  H04Q11/04 ,  H04L12/437

    CPC分类号： H04Q11/0478 ,  H04L2012/5612 ,  H04L2012/562 ,  H04L2012/5625 ,  H04L2012/5674

    摘要： An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.

    摘要翻译： 一种ATM通信系统，包括通过总线连接的多个通信节点，设置在每个通信节点中的缓冲器，用于在相同定时进行所有通信节点的小区解复用的同步脉冲生成电路，设置在每个通信节点中的存储设备 存储通信节点的安装位置信息和时隙发生器位置信息，以及每个通信节点根据上述位置信息自动发送和接收信元的电路。

    Bus type clock supplying system for providing a clock in a communication system with a plurality of clock bus lines
    3.
    发明授权
    Bus type clock supplying system for providing a clock in a communication system with a plurality of clock bus lines 失效
    总线类型时钟供应系统，用于在具有多个时钟总线的通信系统中提供时钟

    公开(公告)号：US5631931A

    公开(公告)日：1997-05-20

    申请号：US219525

    申请日：1994-03-29

    申请人： Masataka Takano ,  Toshihide Fujio

    发明人： Masataka Takano ,  Toshihide Fujio

    IPC分类号： G06F1/12 ,  G06F1/04 ,  H03L7/14 ,  H04J3/06 ,  H04L7/00 ,  H04L7/04 ,  H04B7/12

    CPC分类号： H04J3/0688 ,  H03L7/143 ,  H04L7/0008

    摘要： A bus type clock supplying system in a communication system with master-slave synchronization includes communication cards connected with transmission lines within a communication system and a clock bus. Each communication card includes a clock supplying section including a frequency divider for extracting a clock from the transmission lines and a tri-state device outputting the clock to the clock bus; a clock receiving section including a clock selector for selecting one clock from a plurality of the bus-type clock lines, and a frequency multiplier for multiplying the frequency of the selected clock; and a monitoring and controlling section having a function of monitoring interruption of clock input, abnormalities in the frequency multiplier, etc., and a function of controlling the tri-state device and the clock selector.

    摘要翻译： 在具有主从同步的通信系统中的总线类型时钟供给系统包括与通信系统内的传输线连接的通信卡和时钟总线。 每个通信卡包括时钟提供部分，其包括用于从传输线提取时钟的分频器和将时钟输出到时钟总线的三态装置; 时钟接收部分，包括用于从多个总线类型时钟线选择一个时钟的时钟选择器，以及用于将所选时钟的频率相乘的倍频器; 以及具有监视时钟输入中断，倍频器异常等功能的监视和控制部分，以及控制三态装置和时钟选择器的功能。

    Aim switching system and path changing method
    5.
    发明授权
    Aim switching system and path changing method 失效
    目标切换系统和路径改变方法

    公开(公告)号：US5764624A

    公开(公告)日：1998-06-09

    申请号：US608561

    申请日：1996-02-28

    申请人： Noboru Endo ,  Masataka Takano

    发明人： Noboru Endo ,  Masataka Takano

    IPC分类号： H04L1/22 ,  H04L12/70 ,  H04L29/14 ,  H04Q3/00 ,  H04Q3/42 ,  H04L12/56

    CPC分类号： H04L49/3009 ,  H04L49/3081 ,  H04L49/557 ,  H04L2012/5619 ,  H04L2012/5627 ,  H04L49/253 ,  H04L49/30 ,  H04L49/555

    摘要： An ATM switching system at each node of a network performs route changing or rerouting promptly when a failure occurs. In each of ATM switching systems at nodes N1 to N6: a route table 21 of a line interface 102 is set with conversion header information of a normal route, and an alternate routing table 25 is set with header information of one or more alternate routes. Subsequently, each line interface tests, when a packet arrives, whether or not a failure has occurred in an output line involved in the normal route, by referring to a bitmap 264 storing failure lines and a VP failures. The line interface executes header conversion by applying the normal header information stored in the routing table 21 in the case of no failure set for the normal route and by applying the header information stored in the alternate routing table 25 in case a failure has occurred on the normal route, and then outputs the packet to an ATM switch 101. Since the alternate route is promptly selected at the time of a failure of a net line and not in response to decoding a header of a received packet, the number of packets discarded due to the failure is reduced, and the rerouting operation is promptly executed even in the case of multiple failures.

    摘要翻译： 当网络发生故障时，网络的每个节点上的ATM交换系统会立即执行路由改变或重新路由。 在节点N1至N6的每个ATM交换系统中：线路接口102的路由表21被设置为具有正常路由的转换报头信息，并且备用路由表25被设置为一个或多个备用路由的报头信息。 随后，通过参考存储故障线路和VP故障的位图264，每个线路接口测试分组到达时是否在正常路由中涉及的输出线路中发生故障。 线路接口通过在没有为正常路由设置的情况下应用存储在路由表21中的标准头信息来执行报头转换，并且在发生故障的情况下应用存储在备用路由表25中的报头信息 正常路由，然后将该分组输出到ATM交换机101.由于在网线故障时迅速地选择了备用路由，而不是响应于解码接收到的分组的报头，所以丢弃的分组数量 故障减少，并且即使在多次故障的情况下也能够迅速执行重新路由操作。

    Switching system and subscriber's circuit controlling apparatus
    7.
    发明授权
    Switching system and subscriber's circuit controlling apparatus 失效
    开关系统和用户的电路控制装置

    公开(公告)号：US5404389A

    公开(公告)日：1995-04-04

    申请号：US992535

    申请日：1992-12-17

    申请人： Yasushi Fukuda ,  Masataka Takano ,  Setsuo Takahashi

    发明人： Yasushi Fukuda ,  Masataka Takano ,  Setsuo Takahashi

    IPC分类号： H04L1/08 ,  H04M3/08 ,  H04M3/22 ,  H04Q3/42 ,  H04Q3/545 ,  H04M1/24

    CPC分类号： H04Q3/545

    摘要： A switching system which includes subscriber's circuit device connected to terminals and a subscriber's circuit controlling apparatus between a host apparatus and subscriber's circuit devices for controlling the subscriber's circuit devices in accordance with a control order corresponding to control information from the host apparatus. Each of the subscriber's circuit controlling apparatuses includes an order processing unit which analyzes control information which is transmitted from the host apparatus for comparing the received control information with last received control information and transmits a control order to the subscriber's circuit devices. The order processing unit transmits control orders a number of times to the subscriber's circuit devices and accepts a fault report, from the subscriber's circuit devices to retransmit a control order. The subscriber's circuit devices receive the control order a number of times for collating the control orders and outputs a fault report when in disagreement.

    摘要翻译： 一种交换系统，其包括连接到终端的用户电路设备和主机设备与用户电路设备之间的用户电路控制设备，用于根据与来自主机设备的控制信息对应的控制命令来控制用户的电路设备。 每个用户的电路控制装置包括一个订单处理单元，其分析从主机装置发送的用于将接收的控制信息与上一次接收到的控制信息进行比较的控制信息，并将控制命令发送给用户的电路装置。 订单处理单元向订户的电路设备发送多次控制订单，并从订户的电路设备接收故障报告以重新发送控制命令。 用户的电路设备多次接收控制命令，用于整理控制命令，并在出现异议时输出故障报告。