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    ULTRASOUND TRANSDUCER AND ELECTRONIC DEVICE
    2.
    发明申请
    ULTRASOUND TRANSDUCER AND ELECTRONIC DEVICE 有权
    超声波传感器和电子设备

    公开(公告)号：US20090262605A1

    公开(公告)日：2009-10-22

    申请号：US12424118

    申请日：2009-04-15

    申请人： Katsuhiro WAKABAYASHI ,  Hideo ADACHI ,  Kazuya MATSUMOTO ,  Mamoru HASEGAWA ,  Kazuhisa KARAKI ,  Yoshitaka KAMIYA

    发明人： Katsuhiro WAKABAYASHI ,  Hideo ADACHI ,  Kazuya MATSUMOTO ,  Mamoru HASEGAWA ,  Kazuhisa KARAKI ,  Yoshitaka KAMIYA

    IPC分类号： H04R19/00

    CPC分类号： B06B1/0292

    摘要： An ultrasound transducer includes a substrate, an ultrasound transducer cell placed on one surface of the substrate and having a lower electrode, a first gap portion placed on the lower electrode and an upper electrode placed on the first gap portion, a first conductive layer placed on the other surface of the substrate and electrically connected to one of the lower electrode and the upper electrode, an electret film placed on the first conductive layer, an insulating layer placed on the electret film, and a second conductive layer placed on the insulating layer and electrically connected to the one of the lower electrode and the upper electrode not electrically connected to the first conductive layer.

    摘要翻译： 超声波换能器包括基板，放置在基板的一个表面上的超声换能器单元，具有下电极，放置在下电极上的第一间隙部分和放置在第一间隙部分上的上电极，第一导电层置于 基板的另一个表面，并且电连接到下电极和上电极中的一个，驻留在第一导电层上的驻极体膜，设置在驻极体膜上的绝缘层和放置在绝缘层上的第二导电层， 电连接到未电连接到第一导电层的下电极和上电极之一。

    ULTRASOUND TRANSDUCER AND ULTRASOUND DIAGNOSTIC APPARATUS
    3.
    发明申请
    ULTRASOUND TRANSDUCER AND ULTRASOUND DIAGNOSTIC APPARATUS 有权
    超声波传感器和超声波诊断设备

    公开(公告)号：US20130018269A1

    公开(公告)日：2013-01-17

    申请号：US13614168

    申请日：2012-09-13

    申请人： Kazuya MATSUMOTO ,  Katsuhiro WAKABAYASHI ,  Jin HIRAOKA ,  Kazuhisa KARAKI ,  Mamoru HASEGAWA ,  Satoshi YOSHIDA

    发明人： Kazuya MATSUMOTO ,  Katsuhiro WAKABAYASHI ,  Jin HIRAOKA ,  Kazuhisa KARAKI ,  Mamoru HASEGAWA ,  Satoshi YOSHIDA

    IPC分类号： G01N29/34 ,  A61B8/00

    CPC分类号： A61B8/12 ,  A61B8/445 ,  A61B8/4494 ,  B06B1/0292

    摘要： An ultrasound transducer includes a substrate and a lower electrode layer, a lower insulating layer, an upper insulating layer, and an upper electrode layer. The lower insulating layer and the upper insulating layer are arranged to be opposed to each other via an air gap section. The upper insulating layer and the lower insulating layer are different in a material and thickness and satisfy Equation 1 below. In Equation 1, K1 represents a relative dielectric constant of the lower insulating layer, K2 represents a relative dielectric constant of the upper insulating layer, T1 represents thickness of the lower insulating layer, T2 represents thickness of the upper insulating layer, ρ1(x) represents a charge density distribution in the lower insulating layer, and ρ2(y) represents a charge density distribution in the upper insulating layer. 1 K   1  ∫ 0 T   1  x × ρ   1  ( x )    x = 1 K   2  ∫ 0 T   2  y × ρ   2  ( y )    y ( Equation   1 )

    摘要翻译： 超声波换能器包括基板和下电极层，下绝缘层，上绝缘层和上电极层。 下绝缘层和上绝缘层经由气隙部分布置成彼此相对。 上绝缘层和下绝缘层的材料和厚度不同，满足下面的等式1。 在等式1中，K1表示下绝缘层的相对介电常数，K2表示上绝缘层的相对介电常数，T1表示下绝缘层的厚度，T2表示上绝缘层的厚度， x）表示下绝缘层中的电荷密度分布，并且2（y）表示上绝缘层中的电荷密度分布。 1 K∫∫∫∫∫;;;;;;;;; （1）（x）x∫∫∫∫∫∫∫∫;;;; （2）（y）

    ULTRASONIC TRANSDUCER, ULTRASONIC TRANSDUCER FABRICATION METHOD, AND ULTRASONIC ENDOSCOPE
    4.
    发明申请
    ULTRASONIC TRANSDUCER, ULTRASONIC TRANSDUCER FABRICATION METHOD, AND ULTRASONIC ENDOSCOPE 有权
    超声波传感器，超声波传感器制造方法和超声内镜

    公开(公告)号：US20110036808A1

    公开(公告)日：2011-02-17

    申请号：US12914651

    申请日：2010-10-28

    申请人： Kazuya MATSUMOTO ,  Ryo OHTA ,  Mamoru HASEGAWA ,  Hideo ADACHI ,  Katsuhiro WAKABAYASHI

    发明人： Kazuya MATSUMOTO ,  Ryo OHTA ,  Mamoru HASEGAWA ,  Hideo ADACHI ,  Katsuhiro WAKABAYASHI

    IPC分类号： H04R31/00

    CPC分类号： A61B8/4488 ,  A61B8/12 ,  A61B8/445 ,  B06B1/0292 ,  Y10T29/42 ,  Y10T29/49005 ,  Y10T29/49155

    摘要： An ultrasonic transducer according to the present invention includes: two or more ultrasonic transducer cells, each of which has a lower electrode, a first insulating layer placed on the lower electrode, a cavity placed on the first insulating layer, a second insulating layer placed on the cavity, and an upper electrode placed above the second insulating layer; channels which communicate the cavities with each other; the second insulating layer placed on the channels; holes formed in the second insulating layer placed on the channels; and sealing portions which seal the holes, where that part of the sealing portions which enters the channels is the same in cross-sectional shape as the holes.

    摘要翻译： 根据本发明的超声波换能器包括：两个或更多个超声波换能器单元，每个超声换能器单元具有下电极，设置在下电极上的第一绝缘层，放置在第一绝缘层上的空腔，放置在第二绝缘层上的第二绝缘层 所述空腔和位于所述第二绝缘层上方的上电极; 将空腔相互通信的通道; 第二绝缘层放置在通道上; 形成在通道上的第二绝缘层中的孔; 以及密封孔的密封部分，其中进入通道的密封部分的那部分与孔的横截面形状相同。

    ULTRASONIC TRANSDUCER, MANUFACTURING METHOD OF ULTRASONIC TRANSDUCER, AND ULTRASONIC ENDOSCOPE
    6.
    发明申请
    ULTRASONIC TRANSDUCER, MANUFACTURING METHOD OF ULTRASONIC TRANSDUCER, AND ULTRASONIC ENDOSCOPE 有权
    超声波传感器，超声波传感器的制造方法和超声内镜

    公开(公告)号：US20080089179A1

    公开(公告)日：2008-04-17

    申请号：US11870786

    申请日：2007-10-11

    申请人： Kazuya MATSUMOTO ,  Ryo OHTA ,  Mamoru HASEGAWA ,  Hideo ADACHI ,  Katsuhiro WAKABAYASHI

    发明人： Kazuya MATSUMOTO ,  Ryo OHTA ,  Mamoru HASEGAWA ,  Hideo ADACHI ,  Katsuhiro WAKABAYASHI

    IPC分类号： H04R31/00 ,  A61B8/00 ,  B06B1/06 ,  H04R17/00

    CPC分类号： A61B8/4488 ,  A61B8/12 ,  A61B8/445 ,  B06B1/0292 ,  Y10T29/42 ,  Y10T29/49005 ,  Y10T29/49155

    摘要： An ultrasonic transducer according to the present invention includes: two or more ultrasonic transducer cells, each of which has a lower electrode, a first insulating layer placed on the lower electrode, a cavity placed on the first insulating layer, a second insulating layer placed on the cavity, and an upper electrode placed above the second insulating layer; channels which communicate the cavities with each other; the second insulating layer placed on the channels; holes formed in the second insulating layer placed on the channels; and sealing portions which seal the holes, where that part of the sealing portions which enters the channels is the same in cross-sectional shape as the holes.

    摘要翻译： 根据本发明的超声波换能器包括：两个或更多个超声波换能器单元，每个超声波换能器单元具有下电极，位于下电极上的第一绝缘层，放置在第一绝缘层上的空腔，放置在第二绝缘层上的第二绝缘层 所述空腔和位于所述第二绝缘层上方的上电极; 将空腔相互通信的通道; 第二绝缘层放置在通道上; 形成在通道上的第二绝缘层中的孔; 以及密封孔的密封部分，其中进入通道的密封部分的那部分与孔的横截面形状相同。

    DATA SIGNAL LOADING CIRCUIT, DISPLAY PANEL DRIVING CIRCUIT, AND IMAGE DISPLAY APPARATUS
    8.
    发明申请
    DATA SIGNAL LOADING CIRCUIT, DISPLAY PANEL DRIVING CIRCUIT, AND IMAGE DISPLAY APPARATUS 有权
    数据信号加载电路，显示面板驱动电路和图像显示设备

    公开(公告)号：US20100039426A1

    公开(公告)日：2010-02-18

    申请号：US12536866

    申请日：2009-08-06

    申请人： Kazuya MATSUMOTO ,  Yasuyuki DOI

    发明人： Kazuya MATSUMOTO ,  Yasuyuki DOI

    IPC分类号： G06F3/038 ,  G09G3/36

    CPC分类号： H03K19/018528 ,  G09G3/3688 ,  G09G2310/0294 ,  G09G2330/021

    摘要： A data signal loading circuit (i) which includes: a comparator CMP1 receiving clock signal CKP and reverse-phase signal CKN of clock signal CKP, and outputting clock signal CLP1 which is in phase with clock signal CKP, and clock signal CLN 1 having a reverse phase of clock signal CKP; a comparator CMP 2 having a non-inverting input terminal receiving clock signal CLP1, and an inverting input terminal receiving clock signal CLN1; and a comparator CMP3 having an inverting input terminal receiving clock signal CLP 1, and a non-inverting input terminal receiving clock signal CLN 1, and (ii) which, by using output signals CL1 and CL2 of the comparator CMP2 and the comparator CMP3 as clock signals for latch circuits L1 and L2, equalizes delay times for the rise or fall of clock signals CL1 and CL2 inputted to the latch circuits L1 and L2, and (iii) has low power consumption.

    摘要翻译： 一种数据信号加载电路（i），包括：比较器CMP1，接收时钟信号CKP的时钟信号CKP和反相信号CKN，并输出与时钟信号CKP同相的时钟信号CLP1，以及时钟信号CLN 1具有 时钟信号CKP的反向相位; 具有非反相输入端子接收时钟信号CLP1的比较器CMP2和反相输入端子接收时钟信号CLN1; 以及具有反相输入端子接收时钟信号CLP 1的比较器CMP3和非反相输入端子接收时钟信号CLN 1，以及（ii）通过使用比较器CMP2和比较器CMP3的输出信号CL1和CL2作为 用于锁存电路L1和L2的时钟信号，均衡输入到锁存电路L1和L2的时钟信号CL1和CL2的上升或下降的延迟时间，以及（iii）具有低功耗。

    IMPEDANCE CONVERTING CIRCUIT AND ELECTRONIC DEVICE
    9.
    发明申请
    IMPEDANCE CONVERTING CIRCUIT AND ELECTRONIC DEVICE 失效
    阻抗转换电路和电子器件

    公开(公告)号：US20070236252A1

    公开(公告)日：2007-10-11

    申请号：US11697524

    申请日：2007-04-06

    申请人： Kazuya MATSUMOTO ,  Hiroshi Suzunaga

    发明人： Kazuya MATSUMOTO ,  Hiroshi Suzunaga

    IPC分类号： H03K19/0175

    CPC分类号： H03K19/0185 ,  H03K19/0005

    摘要： A semiconductor circuit including an input terminal, an impedance converting portion configured to receive an input signal from the input terminal and to output an output signal corresponding to the input signal, an input impedance of the semiconductor circuit being higher than an output impedance of the semiconductor circuit, a detecting portion connected to a node between the input terminal and the impedance converting portion, and configured to detect whether the input signal is higher than a predetermined threshold, and a variable impedance connected to a reference voltage and the node, an impedance of the variable impedance configured to decrease after the input signal is detected as higher than the predetermined threshold.

    摘要翻译： 一种半导体电路，包括输入端子，阻抗转换部分，被配置为从输入端子接收输入信号并输出​​与输入信号相对应的输出信号，半导体电路的输入阻抗高于半导体的输出阻抗 电路，连接到输入端子和阻抗转换部分之间的节点的检测部分，并且被配置为检测输入信号是否高于预定阈值，以及连接到参考电压和节点的可变阻抗，阻抗 所述可变阻抗被配置为在所述输入信号被检测为高于所述预定阈值之后减小。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
    10.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 有权
    制造半导体器件和半导体器件的方法

    公开(公告)号：US20080217743A1

    公开(公告)日：2008-09-11

    申请号：US12040447

    申请日：2008-02-29

    申请人： Kazuaki KOJIMA ,  Takatoshi IGARASHI ,  Kazuya MATSUMOTO

    发明人： Kazuaki KOJIMA ,  Takatoshi IGARASHI ,  Kazuya MATSUMOTO

    IPC分类号： H01L23/544 ,  H01L21/00

    CPC分类号： H01L23/585 ,  H01L21/76898 ,  H01L2924/0002 ,  H01L2924/00

    摘要： According to a method of manufacturing a semiconductor device, a short-circuit wiring is formed in a region on a wafer including a dicing region, and electrode pads for input and output signals of a plurality of devices disposed in a semiconductor device forming region are electrically short-circuited by the short-circuit wiring, so that occurrence of plasma damage is suppressed even if the wafer is subjected to various plasma processes. When the wafer subjected to the plasma processes is cut along the dicing region to separate a semiconductor device, the electrical short-circuit of the electrode pads by the short-circuit wiring is released, so that the functionally unwanted short-circuit of the devices or the like is appropriately released.

    摘要翻译： 根据制造半导体器件的方法，在包括切割区域的晶片的区域中形成短路布线，并且设置在半导体器件形成区域中的多个器件的输入和输出信号的电极焊盘是电 短路布线短路，即使对晶片进行各种等离子体处理也能够抑制等离子体损伤的发生。 当沿着切割区切割经受等离子体处理的晶片以分离半导体器件时，通过短路布线的电极焊盘的电短路被释放，使得器件或功能上不需要的短路 适当地释放。