公开(公告)号：US20120241877A1

公开(公告)日：2012-09-27

申请号：US13220116

申请日：2011-08-29

申请人： Kazuhide ABE ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya ,  Takashi Kawakubo

发明人： Kazuhide ABE ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya ,  Takashi Kawakubo

IPC分类号： H01L29/84

CPC分类号： H03J3/20 ,  H03B5/326 ,  H03H9/02566

摘要： According to one embodiment, an acoustic semiconductor device includes an element unit, and a first terminal. The element unit includes an acoustic resonance unit. The acoustic resonance unit includes a semiconductor crystal. An acoustic standing wave is excitable in the acoustic resonance unit and is configured to be synchronously coupled with electric charge density within at least one portion of the semiconductor crystal via deformation-potential coupling effect. The first terminal is electrically connected to the element unit. At least one selected from outputting and inputting an electrical signal is implementable via the first terminal. The electrical signal is coupled with the electric charge density. The outputting the electrical signal is from the acoustic resonance unit, and the inputting the electrical signal is into the acoustic resonance unit.

摘要翻译： 根据一个实施例，声学半导体器件包括元件单元和第一端子。 元件单元包括声共振单元。 声共振单元包括半导体晶体。 声驻波在声共振单元中是可兴奋的，并且被配置为通过变形电势耦合效应与半导体晶体的至少一部分内的电荷密度同步耦合。 第一端子电连接到元件单元。 从输出和输入电信号中选出的至少一个可经由第一终端实现。 电信号与电荷密度耦合。 输出电信号来自声共振单元，并且输入电信号进入声共振单元。

公开(公告)号：US08648431B2

公开(公告)日：2014-02-11

申请号：US13220116

申请日：2011-08-29

申请人： Kazuhide Abe ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya ,  Takashi Kawakubo

发明人： Kazuhide Abe ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya ,  Takashi Kawakubo

IPC分类号： H01L29/84

CPC分类号： H03J3/20 ,  H03B5/326 ,  H03H9/02566

摘要： According to one embodiment, an acoustic semiconductor device includes an element unit, and a first terminal. The element unit includes an acoustic resonance unit. The acoustic resonance unit includes a semiconductor crystal. An acoustic standing wave is excitable in the acoustic resonance unit and is configured to be synchronously coupled with electric charge density within at least one portion of the semiconductor crystal via deformation-potential coupling effect. The first terminal is electrically connected to the element unit. At least one selected from outputting and inputting an electrical signal is implementable via the first terminal. The electrical signal is coupled with the electric charge density. The outputting the electrical signal is from the acoustic resonance unit, and the inputting the electrical signal is into the acoustic resonance unit.

摘要翻译： 根据一个实施例，声学半导体器件包括元件单元和第一端子。 元件单元包括声共振单元。 声共振单元包括半导体晶体。 声驻波在声共振单元中是可兴奋的，并且被配置为通过变形电势耦合效应与半导体晶体的至少一部分内的电荷密度同步耦合。 第一端子电连接到元件单元。 从输出和输入电信号中选出的至少一个可经由第一终端实现。 电信号与电荷密度耦合。 输出电信号来自声共振单元，并且输入电信号进入声共振单元。

公开(公告)号：US08324707B2

公开(公告)日：2012-12-04

申请号：US13050545

申请日：2011-03-17

申请人： Tadahiro Sasaki ,  Kazuhide Abe ,  Atsuko Iida ,  Kazuhiko Itaya

发明人： Tadahiro Sasaki ,  Kazuhide Abe ,  Atsuko Iida ,  Kazuhiko Itaya

IPC分类号： H01L27/105

CPC分类号： H01L27/088 ,  H01L21/823493 ,  H01L27/0207 ,  H01L27/0922 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/78

摘要： According to an embodiment, a power amplifier is provided with at least one first growth ring gate structure and multiple second growth ring gate structures. The first growth ring gate structure is bounded by a semiconductor layer and performs a power amplification operation. The multiple second growth ring gate structures are bounded by the semiconductor layer and are arranged adjacently around the first growth ring gate structure in a surrounding manner. When the first growth ring gate structure performs a power amplification operation, the multiple second growth ring gate structures are depleted by applying a reverse bias to the multiple second growth ring gate structures whereby the depleted multiple second growth ring gate structures isolate the first growth ring gate structure from a surrounding portion.

摘要翻译： 根据实施例，功率放大器设置有至少一个第一增长环栅极结构和多个第二增长环栅极结构。 第一生长环栅极结构由半导体层限制并进行功率放大操作。 多个第二生长环形栅极结构由半导体层限制，并且以周围的方式围绕第一生长环栅极结构相邻布置。 当第一生长环栅极结构执行功率放大操作时，通过向多个第二生长环栅极结构施加反向偏压来耗尽多个第二生长环栅结构，由此耗尽的多个第二生长环栅极结构将第一生长环栅极隔离 结构从周围部分。

公开(公告)号：US08513715B2

公开(公告)日：2013-08-20

申请号：US12873788

申请日：2010-09-01

申请人： Kazuhide Abe ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya

发明人： Kazuhide Abe ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya

IPC分类号： H01L29/78

CPC分类号： H01L29/78 ,  H01L29/41758 ,  H01L29/4238 ,  H03B5/326

摘要： According to an embodiment, the present invention provides a semiconductor device that is easily integrated with other electronic circuits and functions as an oscillator with high frequency accuracy. The semiconductor device includes: a semiconductor substrate; an element region; an element isolation region that surrounds the element region; a field effect transistor including a gate electrode that is formed on the element region, source and drain regions, and a channel region that is interposed between the source region and the drain region; gate, source, and drain terminals that are used to apply a voltage to the gate electrode, the source region, and the drain region, respectively; and an output terminal that is electrically connected to the channel region. When the threshold voltage of the field effect transistor is Vth, a gate voltage Vgs applied between the source terminal and the gate terminal and a drain voltage Vds applied between the source terminal and the drain terminal satisfy the following relationship: Vth

摘要翻译： 根据实施例，本发明提供一种与其他电子电路容易集成并且作为高频精度的振荡器起作用的半导体器件。 半导体器件包括：半导体衬底; 元素区域 围绕元件区域的元件隔离区域; 场效应晶体管，其包括形成在所述元件区域，源极和漏极区域上的栅极电极以及介于所述源极区域和所述漏极区域之间的沟道区域; 栅极，源极和漏极端子，分别用于向栅极电极，源极区域和漏极区域施加电压; 以及电连接到沟道区的输出端子。 当场效应晶体管的阈值电压为Vth时，施加在源极端子和栅极端子之间的栅极电压Vgs和施加在源极端子和漏极端子之间的漏极电压Vds满足以下关系：Vth

公开(公告)号：US20120061768A1

公开(公告)日：2012-03-15

申请号：US13050545

申请日：2011-03-17

申请人： Tadahiro SASAKI ,  Kazuhide Abe ,  Atsuko Iida ,  Kazuhiko Itaya

发明人： Tadahiro SASAKI ,  Kazuhide Abe ,  Atsuko Iida ,  Kazuhiko Itaya

IPC分类号： H01L27/092

CPC分类号： H01L27/088 ,  H01L21/823493 ,  H01L27/0207 ,  H01L27/0922 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/78

摘要： According to an embodiment, a power amplifier is provided with at least one first growth ring gate structure and multiple second growth ring gate structures. The first growth ring gate structure is bounded by a semiconductor layer and performs a power amplification operation. The multiple second growth ring gate structures are bounded by the semiconductor layer and are arranged adjacently around the first growth ring gate structure in a surrounding manner. When the first growth ring gate structure performs a power amplification operation, the multiple second growth ring gate structures are depleted by applying a reverse bias to the multiple second growth ring gate structures whereby the depleted multiple second growth ring gate structures isolate the first growth ring gate structure from a surrounding portion.

摘要翻译： 根据实施例，功率放大器设置有至少一个第一增长环栅极结构和多个第二增长环栅极结构。 第一生长环栅极结构由半导体层限制并进行功率放大操作。 多个第二生长环形栅极结构由半导体层限制，并且以周围的方式围绕第一生长环栅极结构相邻布置。 当第一生长环栅极结构执行功率放大操作时，通过向多个第二生长环栅极结构施加反向偏压来耗尽多个第二生长环栅结构，由此耗尽的多个第二生长环栅极结构将第一生长环栅极隔离 结构从周围部分。

公开(公告)号：US20110220974A1

公开(公告)日：2011-09-15

申请号：US12873788

申请日：2010-09-01

申请人： Kazuhide Abe ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya

发明人： Kazuhide Abe ,  Tadahiro Sasaki ,  Atsuko Iida ,  Kazuhiko Itaya

IPC分类号： H01L29/78

CPC分类号： H01L29/78 ,  H01L29/41758 ,  H01L29/4238 ,  H03B5/326

摘要： According to an embodiment, the present invention provides a semiconductor device that is easily integrated with other electronic circuits and functions as an oscillator with high frequency accuracy. The semiconductor device includes: a semiconductor substrate; an element region; an element isolation region that surrounds the element region; a field effect transistor including a gate electrode that is formed on the element region, source and drain regions, and a channel region that is interposed between the source region and the drain region; gate, source, and drain terminals that are used to apply a voltage to the gate electrode, the source region, and the drain region, respectively; and an output terminal that is electrically connected to the channel region. When the threshold voltage of the field effect transistor is Vth, a gate voltage Vgs applied between the source terminal and the gate terminal and a drain voltage Vds applied between the source terminal and the drain terminal satisfy the following relationship: Vth

摘要翻译： 根据实施例，本发明提供一种与其他电子电路容易集成并且作为高频精度的振荡器起作用的半导体器件。 半导体器件包括：半导体衬底; 元素区域 围绕元件区域的元件隔离区域; 场效应晶体管，其包括形成在所述元件区域，源极和漏极区域上的栅极电极以及介于所述源极区域和所述漏极区域之间的沟道区域; 栅极，源极和漏极端子，分别用于向栅极电极，源极区域和漏极区域施加电压; 以及电连接到沟道区的输出端子。 当场效应晶体管的阈值电压为Vth时，施加在源极端子和栅极端子之间的栅极电压Vgs和施加在源极端子和漏极端子之间的漏极电压Vds满足以下关系：Vth

公开(公告)号：US09117931B2

公开(公告)日：2015-08-25

申请号：US13685859

申请日：2012-11-27

申请人： Kazuhide Abe ,  Atsuko Iida ,  Kazuhiko Itaya ,  Junji Wadatsumi ,  Shouhei Kousai

发明人： Kazuhide Abe ,  Atsuko Iida ,  Kazuhiko Itaya ,  Junji Wadatsumi ,  Shouhei Kousai

IPC分类号： H01L29/84 ,  H03H9/24 ,  H03H9/02

CPC分类号： H01L29/84 ,  H01L2924/1461 ,  H03H9/2405 ,  H03H2009/02314

摘要： A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.

摘要翻译： 根据实施例的半导体器件具有：半导体衬底; 形成在所述半导体衬底上的声谐振器，具有包括通过耗尽层与所述衬底电绝缘的杂质的半导体层，并且被配置为基于在所述半导体层中激发的声驻波以预定的谐振频率谐振; 温度检测器，形成在所述半导体衬底上，并被配置为检测所述半导体衬底的温度; 计算单元，其形成在所述半导体基板上，并且被配置为基于由所述温度检测器检测到的温度进行温度补偿的计算，所述杂质的种类和所述杂质的浓度; 以及控制器，其形成在所述半导体基板上，并且被配置为基于所述计算单元的计算结果来控制所述共振频率。

公开(公告)号：US07893525B2

公开(公告)日：2011-02-22

申请号：US12350727

申请日：2009-01-08

申请人： Atsuko Iida ,  Yutaka Onozuka ,  Kazuhiko Itaya

发明人： Atsuko Iida ,  Yutaka Onozuka ,  Kazuhiko Itaya

IPC分类号： H01L21/98

CPC分类号： B81C1/00253 ,  B81C1/00238 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00

摘要： It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically connected to the MEMS device; a second chip including a semiconductor device and a second pad formed on an upper face of the semiconductor device, the second pad being electrically connected to the semiconductor device; and an adhesive portion having a stacked structure, and bonding a side face of the first chip and a side face of the second chip, the stacked structure including a first adhesive film formed by adding a first material constant modifier to a first resin, and a second adhesive film formed by adding a second material constant modifier to a second resin.

摘要翻译： 可以在树脂固化时限制翘曲并实现更小的厚度。 半导体器件包括：第一芯片，其包括MEMS器件和形成在MEMS器件的上表面上的第一焊盘，第一焊盘电连接到MEMS器件; 包括半导体器件的第二芯片和形成在所述半导体器件的上表面上的第二焊盘，所述第二焊盘电连接到所述半导体器件; 以及具有堆叠结构的粘合部分，并且将第一芯片的侧面和第二芯片的侧面接合，所述堆叠结构包括通过将第一材料常数改性剂添加到第一树脂而形成的第一粘合膜，以及 通过将第二材料常数改性剂加入到第二树脂中形成的第二粘合剂膜。

公开(公告)号：US20090179317A1

公开(公告)日：2009-07-16

申请号：US12350727

申请日：2009-01-08

申请人： Atsuko Iida ,  Yutaka Onozuka ,  Kazuhiko Itaya

发明人： Atsuko Iida ,  Yutaka Onozuka ,  Kazuhiko Itaya

IPC分类号： H01L23/00 ,  H01L21/98

CPC分类号： B81C1/00253 ,  B81C1/00238 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00

摘要： It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically connected to the MEMS device; a second chip including a semiconductor device and a second pad formed on an upper face of the semiconductor device, the second pad being electrically connected to the semiconductor device; and an adhesive portion having a stacked structure, and bonding a side face of the first chip and a side face of the second chip, the stacked structure including a first adhesive film formed by adding a first material constant modifier to a first resin, and a second adhesive film formed by adding a second material constant modifier to a second resin.

摘要翻译： 可以在树脂固化时限制翘曲并实现更小的厚度。 半导体器件包括：第一芯片，其包括MEMS器件和形成在MEMS器件的上表面上的第一焊盘，第一焊盘电连接到MEMS器件; 包括半导体器件的第二芯片和形成在所述半导体器件的上表面上的第二焊盘，所述第二焊盘电连接到所述半导体器件; 以及具有堆叠结构的粘合部分，并且将第一芯片的侧面和第二芯片的侧面接合，所述堆叠结构包括通过将第一材料常数改性剂添加到第一树脂而形成的第一粘合膜，以及 通过将第二材料常数改性剂加入到第二树脂中形成的第二粘合剂膜。

公开(公告)号：US06973280B2

公开(公告)日：2005-12-06

申请号：US10792835

申请日：2004-03-05

申请人： Hideki Nukada ,  Atsuko Iida ,  Noriko Yamamoto

发明人： Hideki Nukada ,  Atsuko Iida ,  Noriko Yamamoto

IPC分类号： G03G15/11 ,  G03G15/10

CPC分类号： G03G15/11

摘要： A liquid-developer drying device includes a covering wall which has a facing surface covering and facing to part of an image-carrying body with a drying air passage between them. The image-carrying body carries developed image in a first direction along the drying air passage. The developed image includes liquid developer having toner particles and carrier liquid. The covering wall has a plurality of slits formed therein. The slits are distributed in a region with substantially less than half length along the facing surface covering the image-carrying body so as to blow dry air to the drying air passage in a second direction parallel to the first direction. Each of the slits extends across the drying air passage. The liquid-developer drying device also includes an air source supplying drying air to the slits.

摘要翻译： 液体显影剂干燥装置包括：覆盖壁，其具有覆盖并面向图像载体的一部分的面对表面，并且在其间具有干燥空气通道。 图像承载体沿着干燥空气通道沿第一方向携带显影图像。 显影图像包括具有调色剂颗粒和载体液体的液体显影剂。 覆盖壁上形成有多个狭缝。 狭缝沿着覆盖图像载体的相对表面大致小于半长的区域分布，以便在与第一方向平行的第二方向上将干燥空气吹送到干燥空气通道。 每个狭缝都延伸穿过干燥空气通道。 液体显影干燥装置还包括向狭缝供应干燥空气的空气源。