公开(公告)号：US06680946B1

公开(公告)日：2004-01-20

申请号：US09302286

申请日：1999-04-30

申请人： Kazuhiko Isoyama ,  Toshiya Aramaki ,  Akira Arutaki

发明人： Kazuhiko Isoyama ,  Toshiya Aramaki ,  Akira Arutaki

IPC分类号： H04L1256

CPC分类号： H04L49/256 ,  H04L12/5601

摘要： A method for transferring a series of layer-3 packets through an ATM network composed of a plurality of ATM switches is disclosed. An ingress gateway determines whether a packet flow has been registered and, when the flow has not been registered, determines a transfer route. A connection setup cell is transmitted to a next-hop ATM switch to ensure a connection dedicated to transfer of tho series of packets. Then, a series of packets is transferred to the next-hop ATM switch through the connection after the connection has been set up.

摘要翻译： 公开了一种通过由多个ATM交换机组成的ATM网络传送一系列三层分组的方法。 入口网关确定分组流是否已经被注册，并且当流尚未被注册时，确定传输路由。 连接建立单元被发送到下一跳ATM交换机，以确保专门用于传送一系列数据包的连接。 然后，在连接建立后，一系列数据包通过连接传输到下一跳ATM交换机。

公开(公告)号：US06546422B1

公开(公告)日：2003-04-08

申请号：US09345770

申请日：1999-07-01

申请人： Kazuhiko Isoyama ,  Akira Arutaki ,  Motoo Nishihara

发明人： Kazuhiko Isoyama ,  Akira Arutaki ,  Motoo Nishihara

IPC分类号： G06F15173

CPC分类号： H04L67/02 ,  H04L67/2852

摘要： A caching method for caching network contents of a packet transfer network including a packet relay for relaying accesses of clients to servers supplying contents, and a network contents cache device are disclosed. Accesses from the clients to the servers are monitored by the said packet relay to determine a cache priority on the basis of a product of relaying path lengths from the packet relay to the server and frequency of access from the client to the servers and the network contents cache device preferentially caches a response to the access to the server having higher cache priority.

摘要翻译： 公开了一种用于缓存分组传送网络的网络内容的缓存方法，包括用于将客户机的访问中继到提供内容的服务器的分组中继的网络内容，以及网络内容高速缓存设备。 由所述分组中继器监视从所述分组中继器到所述服务器的访问，以根据从所述分组中继到所述服务器的中继路径长度的乘积以及从所述客户端到所述服务器的接入频率以及所述网络内容来确定高速缓存优先级 高速缓存设备优先地缓存对具有较高高速缓存优先级的服务器的访问的响应。

公开(公告)号：US6049527A

公开(公告)日：2000-04-11

申请号：US824051

申请日：1997-03-21

申请人： Kazuhiko Isoyama ,  Toshiya Aramaki

发明人： Kazuhiko Isoyama ,  Toshiya Aramaki

IPC分类号： H04Q3/00 ,  H04L12/801 ,  H04L12/823 ,  H04L12/851 ,  H04L12/911 ,  H04L12/927 ,  H04Q11/04 ,  H04L12/54 ,  H04L12/56

CPC分类号： H04Q11/0478 ,  H04L2012/5648 ,  H04L2012/5658 ,  H04L2012/5682

摘要： The present invention is to provide a cell discard control system for an ATM (asynchronous transfer mode) cell buffer capable of preventing useless cells which are not restored to an original packet from being transmitted to an ATM network and minimize a discarded number of packets which should not be discarded. It comprises a cell receiving section 11 having a packet identifier adding part 11a for adding a packet identifier for identifying being cellulated from the same packet for an input cell and a cell discard part 11b for discarding cells, a cell buffer 12 for buffering cells transferred from the cell receiving section 11, the cell transmitting section 13 for transmitting cells transferred from the cell buffer 12 to an ATM network and transmitting idle cells instead of discarded cell which have been discarded by a cell discard part 13a, and buffer controller 14 for detecting a packet identifier added to a cell being discarded due to over flow of the cell buffer 12 and instructing the cell receiving section 11 and the cell transmitting section 13 to discard cells having the same packet identifier being detected.

摘要翻译： 本发明提供一种用于ATM（异步传输模式）小区缓冲器的小区丢弃控制系统，其能够防止没有恢复到原始分组的无用小区被发送到ATM网络并且将丢弃的分组数量最小化 不被丢弃 它包括：具有分组标识符添加部分11a的小区接收部分1111，用于添加用于识别的分组标识符，用于从用于输入小区的相同分组中被识别;以及用于丢弃小区的小区丢弃部分11b;小区缓冲器12， 小区接收部分11，用于发送从小区缓冲器12传送到ATM网络的小区的小区发送部分13，并且发送空闲小区而不是被小区丢弃部分13a舍弃的丢弃小区，以及用于检测 分组标识符被添加到由于小区缓冲器12的过流而被丢弃的小区，并且指示小区接收部分11和小区发射部分13丢弃具有被检测到的相同分组标识符的小区。

公开(公告)号：US06982975B1

公开(公告)日：2006-01-03

申请号：US09540990

申请日：2000-03-31

申请人： Toshiya Aramaki ,  Kazuhiko Isoyama

发明人： Toshiya Aramaki ,  Kazuhiko Isoyama

IPC分类号： H04Q11/04 ,  H04L12/56

CPC分类号： H04L49/1561 ,  H04L49/15 ,  H04L49/30 ,  H04L49/3081 ,  H04L2012/5649 ,  H04L2012/565

摘要： In a packet switch structured by connecting unit switches in multi-stages which is capable of transmitting packets without delay and accommodating high-speed lines, unit switches at the first stage assign, to an input packet, a sequence number according to a destination of the packet and distribute and send out the packet to a unit switch at the succeeding stage and unit switches at the final stage sequence and output packets according to sequence numbers assigned to packets received from a unit switch at the preceding stage.

摘要翻译： 在通过连接能够不延迟地发送分组并且容纳高速线路的多级的单元交换机构成的分组交换机中，第一级的单元交换机根据输入的目的地向输入分组分配序列号 分组并发送到后级单元交换机，并在最后阶段切换单元序列，并根据分配给前一单元交换机接收的分组的序列号输出分组。

公开(公告)号：US06570873B1

公开(公告)日：2003-05-27

申请号：US09438397

申请日：1999-11-12

申请人： Kazuhiko Isoyama ,  Toshiya Aramaki

发明人： Kazuhiko Isoyama ,  Toshiya Aramaki

IPC分类号： H04L1256

CPC分类号： H04L49/30 ,  H04L47/50 ,  H04L47/522 ,  H04L47/621 ,  H04L47/6215 ,  H04L49/205 ,  H04L49/254 ,  H04L2012/5651 ,  H04L2012/568 ,  H04L2012/5681 ,  H04Q11/0478

摘要： Disclosed is a system for scheduling reservation of traffic with priority, in which each of input ports detects the reserved addressed output port for a high priority traffic by detecting signaling of the traffic and notifies the reserved addressed output port to a scheduler, the scheduler sets a switch connection for passing the high priority traffic with priority every time slot and assigns other switch connections to best effort traffics, and when the switch connections are determined, outputs grant signals to input ports and setting signal to a switch.

摘要翻译： 公开了一种用于调度具有优先级的业务的预留的系统，其中每个输入端口通过检测业务的信令来检测用于高优先级业务的保留的寻址输出端口，并将保留的寻址的输出端口通知给调度器，调度器设置 交换机连接，用于每个时隙优先通过高优先级流量，并将其他交换机连接分配给尽力服务流量，并且当确定交换机连接时，输出向输入端口授予信号并将信号设置到交换机。

公开(公告)号：US06418145B1

公开(公告)日：2002-07-09

申请号：US09213931

申请日：1998-12-17

申请人： Kazuhiko Isoyama ,  Tatsuhiko Amagai ,  Toshiya Aramaki

发明人： Kazuhiko Isoyama ,  Tatsuhiko Amagai ,  Toshiya Aramaki

IPC分类号： H04L1256

CPC分类号： H04L69/16 ,  H04L29/06 ,  H04L69/161 ,  H04L69/168 ,  H04L69/22 ,  H04L2012/5658 ,  H04L2012/5667 ,  H04Q11/0478

摘要： An internet protocol (IP) layer processor has an IP header processing section for checking a defect in an IP header of a first ATM cell of an AAL5 frame, and a SAR (segregation and reassemblage) section for transferring the AAL5 frame in the form of separate ATM cells if the check by the IP header processing section indicates a normal IP header, without using a CPU. SAR notifies a defect in the IP header to CPU without transmission of the AAL5 frame if the check indicates the defect in the IP header. The IP layer processor achieves a higher processing due to the direct transfer by the SAR without using processing by a software.

摘要翻译： 互联网协议（IP）层处理器具有用于检查AAL5帧的第一ATM信元的IP报头中的缺陷的IP报头处理部分和用于传送AAL5帧的SAR（分离和重新组合）部分，其形式为 如果IP报头处理部分的检查指示正常的IP报头，而不使用CPU，则分离的ATM信元。 如果检查指示IP报头中的缺陷，则SAR将IP报头中的缺陷通知给CPU，而不传输AAL5帧。 IP层处理器由于SAR的直接传输而实现了更高的处理，而不用软件进行处理。

公开(公告)号：US07782766B2

公开(公告)日：2010-08-24

申请号：US10942043

申请日：2004-09-16

申请人： Takahiro Ohkuma ,  Daisuke Kawasaki ,  Kazuhiko Isoyama

发明人： Takahiro Ohkuma ,  Daisuke Kawasaki ,  Kazuhiko Isoyama

IPC分类号： H04L1/10

CPC分类号： H04Q9/00

摘要： The present invention relates to a data collection system and a data collection method in a sensor network, enabling sensor modules to consume lower amounts of power. The base station transmits data collection request signals to one or more sensor modules which are lower than the base station by 1 in a tree structure. Each sensor module which has received the data collection request signal transfers the signal to one or more sensor modules which are lower than the module by 1. The base station regards the transfer of the signal as ACK for the data collection request signal transmitted therefrom to the sensor module which is lower than the base station by 1. The transmission of a data collection acknowledgement signal starts from a sensor module at the low-order end. When a sensor module receives the data collection acknowledgement signal from a downstream sensor module which is lower than the module by 1, the module transmits the signal to an upstream sensor module which is higher than the module by 1. The downstream sensor module regards the transmission of the signal as ACK for the data collection acknowledgement signal transmitted therefrom, and enters standby mode. In this manner, the sensor modules enter standby mode in sequence starting from the sensor module at the low-order end. Thereby, it is possible to achieve reductions in the frequency of signal transmission while maintaining reliable data communication. Thus, each module consumes lower amounts of power.

摘要翻译： 本发明涉及传感器网络中的数据收集系统和数据收集方法，使得传感器模块能够消耗更少的功率。 基站以树结构将数据收集请求信号发送到低于基站1的一个或多个传感器模块。 已经接收到数据收集请求信号的每个传感器模块将信号传送到低于模块1的一个或多个传感器模块。基站将信号的传送视为从其发送的数据收集请求信号的ACK 传感器模块比基站低1。数据采集确认信号的传输从低端的传感器模块开始。 当传感器模块从低于模块1的下游传感器模块接收到数据收集确认信号时，模块将信号发送到高于模块1的上游传感器模块。下游传感器模块将传输 的信号作为从其发送的数据收集确认信号的ACK，并进入待机模式。 以这种方式，传感器模块按顺序从低端的传感器模块进入待机模式。 由此，可以在保持可靠的数据通信的同时实现信号发送的频率的降低。 因此，每个模块消耗较少的功率。

公开(公告)号：US07227860B2

公开(公告)日：2007-06-05

申请号：US09795191

申请日：2001-03-01

申请人： Kazuhiko Isoyama ,  Masahiko Honda

发明人： Kazuhiko Isoyama ,  Masahiko Honda

IPC分类号： H04L12/50

CPC分类号： H04Q11/0478 ,  H04L2012/5679

摘要： A packet switch includes (a) a plurality of inputs into each of which a packet is input, (b) a switch which receives the packet from the input and switches an output through which the packet is transmitted, and (c) a scheduler which controls the switch. The scheduler (103) includes (c1) a shuffler (201) which shuffles an order of precedence in a first request transmitted from the input to transfer the packet, (c2) a schedule algorithm (202) which determines the output, based on the first request having the order of precedence having been shuffled by the shuffler, and produces a second request to transfer a packet which second request is associated with the first request having the order of precedence having been shuffled by the shuffler, and (c3) a re-shuffler (203) which turns an order of precedence of the second request to be identical with the order of precedence in the first request as found before having been shuffled by the shuffler, and returns the thus turned order of precedence back to the input.

摘要翻译： 分组交换机包括（a）输入分组的多个输入，（b）从输入接收分组并切换发送分组的输出的交换机，（c）调度器 控制开关。 调度器（103）包括（c 1）洗牌器（201），其在从输入发送的第一请求中洗牌优先顺序以传送分组;（c 2）基于输出的调度算法（202） 在所述优先顺序已经被所述洗牌者洗牌的所述第一请求上，并且产生第二请求，以将所述第二请求与所述优先顺序已经被所述洗牌者混洗的所述第一请求相关联的分组传送，并且（c 3 一种再洗牌者（203），其将所述第二请求的优先级顺序与所述第一请求中的优先级顺序相同，在被所述洗牌者洗牌之前发现，并且将所述优先顺序返回到 输入。

公开(公告)号：US20050117579A1

公开(公告)日：2005-06-02

申请号：US11009003

申请日：2004-12-13

申请人： Yuuichi Tasaki ,  Kazuhiko Isoyama

发明人： Yuuichi Tasaki ,  Kazuhiko Isoyama

IPC分类号： H04L12/18 ,  H04L12/28 ,  H04L12/70 ,  H04L12/931 ,  H04L12/937 ,  H04L12/947

CPC分类号： H04L49/1576 ,  H04L12/5601 ,  H04L49/106 ,  H04L49/90 ,  H04L2012/562 ,  H04L2012/5641 ,  H04L2012/5642 ,  H04L2012/5681

摘要： A unicast/multicast system has an internal cell generating section that generates an internal cell to include its output index information based on user data, and an output port conversion table that stores the relation of output index information and output port number for the internal cell in the form of one-to-one for the unicast and one-to-multiple for the multicast.

公开(公告)号：US06895006B1

公开(公告)日：2005-05-17

申请号：US09676559

申请日：2000-10-02

申请人： Yuuichi Tasaki ,  Kazuhiko Isoyama

发明人： Yuuichi Tasaki ,  Kazuhiko Isoyama

IPC分类号： H04L12/18 ,  H04L12/28 ,  H04L12/70 ,  H04L12/931 ,  H04L12/937 ,  H04L12/947

CPC分类号： H04L49/1576 ,  H04L12/5601 ,  H04L49/106 ,  H04L49/90 ,  H04L2012/562 ,  H04L2012/5641 ,  H04L2012/5642 ,  H04L2012/5681

摘要： A unicast/multicast system has an internal cell generating section that generates an internal cell to include its output index information based on user data, and an output port conversion table that stores the relation of output index information and output port number for the internal cell in the form of one-to-one for the unicast and one-to-multiple for the multicast.

摘要翻译： 单播/组播系统具有内部小区生成部，其生成内部小区，以基于用户数据包含其输出索引信息;以及输出端口转换表，其将内部小区的输出索引信息和输出端口号的关系存储在 单播的一对一形式，组播的一对一形式。