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    Packet switching equipment and switching control method
    2.
    发明授权
    Packet switching equipment and switching control method 失效
    分组交换设备和切换控制方法

    公开(公告)号：US07751427B2

    公开(公告)日：2010-07-06

    申请号：US11619921

    申请日：2007-01-04

    申请人： Masayuki Shinohara

    发明人： Masayuki Shinohara

    IPC分类号： H04J3/02

    CPC分类号： H04Q11/0478 ,  H04L12/5601 ,  H04L49/1561 ,  H04L49/256 ,  H04L49/455

    摘要： A packet switching equipment and a switch control system employing the same performs operation of the switch core portion independent of content of decision of an arbiter portion and overall equipment can be constructed with simple control structure. The packet switching equipment includes input buffer portions temporarily storing packets arriving to the input ports and outputting packets with adding labels indicative of destination port numbers, a switch core portion for switching the packets on the basis of labels added to the input buffer portions, and an arbiter portion adjusting input buffer portions to provide output permissions for outputting to the output ports. A sorting network autonomously sorting and concentrating the packets on the basis of the labels added to the packets is employed in the switch core portion.

    摘要翻译： 分组交换设备和采用该分组交换设备的交换机控制系统可以独立于仲裁器部分的决策内容和总体设备来执行交换机核心部分的操作，可以用简单的控制结构来构造。 分组交换设备包括临时存储到达输入端口的分组的输入缓冲器部分，并且输出具有指示目的地端口号的添加标签的分组，用于基于添加到输入缓冲器部分的标签来切换分组的交换机核心部分，以及 仲裁器部分调节输入缓冲器部分以提供输出到输出端口的输出许可。 在交换机核心部分中采用基于添加到分组的标签来自动排序和集中分组的分类网络。

    Switching system and switching control method
    3.
    发明授权
    Switching system and switching control method 失效
    切换系统和切换控制方法

    公开(公告)号：US06879592B1

    公开(公告)日：2005-04-12

    申请号：US09516162

    申请日：2000-02-29

    申请人： Koji Hirayama ,  Haruo Shibata ,  Akio Kawase ,  Shinichi Iwaki

    发明人： Koji Hirayama ,  Haruo Shibata ,  Akio Kawase ,  Shinichi Iwaki

    IPC分类号： H04Q3/00 ,  H04L12/64 ,  H04L12/66 ,  H04L12/931 ,  H04L12/947 ,  H04L12/951 ,  H04L12/56

    CPC分类号： H04L49/1507 ,  H04L49/1561 ,  H04L49/253 ,  H04L49/256

    摘要： A switching system for realizing integration of existing communication networks or interconnections thereof, and a switching control method. After a call is originated from an ATM communication network 101 to an STM communication network 102, an ATMIF 20 that has received a connection request signal (control signal) converts the control signal into a format of an ATM cell 1000, adds a header destined to one of SIG 50-1 to n for processing control signals, and then output the same. An ATMSW 10 performs self-routing based on header information. The selected one of the SIG 50-1 to n performs conversion for the ATM cell 1000 by a specified protocol, makes an ATM cell 1100 having a header destined to one of CLP 630-1 to k for processing control signals, and then output the same. Upon having received the ATM cell 1100, the CLP 630 links up with other processors to perform call connection control, functions having been dispersed among the other processors.

    摘要翻译： 一种用于实现现有通信网络或其互连的集成的交换系统，以及切换控制方法。 在从ATM通信网101发送到STM通信网102的呼叫之后，已经接收到连接请求信号（控制信号）的ATMIF 20将控制信号转换为ATM信元1000的格式， 一个SIG 50-1到n用于处理控制信号，然后输出。 ATMSW 10基于头信息执行自路由。 所选择的SIG 50-1至n中的一个通过指定的协议执行ATM信元1000的转换，使具有目的地为CLP 630-1之一的报头的ATM信元1100用于处理控制信号，然后输出 相同。 在接收到ATM信元1100之后，CLP 630与其他处理器相连接以执行呼叫连接控制，功能已经分散在其他处理器中。

    Method of and system for pre-fetching input cells in ATM switch
    5.
    发明授权
    Method of and system for pre-fetching input cells in ATM switch 失效
    ATM交换机中预取输入单元的方法和系统

    公开(公告)号：US5687324A

    公开(公告)日：1997-11-11

    申请号：US555021

    申请日：1995-11-08

    申请人： Patrick Green ,  Thomas Jefferson Runaldue ,  Ronald Bianchini, Jr.

    发明人： Patrick Green ,  Thomas Jefferson Runaldue ,  Ronald Bianchini, Jr.

    IPC分类号： H04L12/56 ,  G06F13/00

    CPC分类号： H04L12/5601 ,  H04L49/106 ,  H04L49/1553 ,  H04L49/1561 ,  H04L49/203 ,  H04L2012/5651 ,  H04L2012/5681

    摘要： An ATM switch with multicast capability uses a feedback mechanism for resolving contentions. A multicast network reads N cells from an input queue, replicates multicast cells and translates their addresses in accordance with an external look-up table. The processed N cells are stored in a temporary buffer until information regarding the number (F) of cells fed back due to contention in the previous switching cycle is available. A rotator positions N-F cells from the temporary buffer on inputs of an output network so as to assign the cells from the temporary buffer a lower priority than a priority of the feed back cells. The output network selects the cells that can be switched to their destinations and transfers them to output ports. The cells that cannot be switched due to contention are fed back to be presented for the output network consideration in the next switching cycle. At the same time, a pointer of the input queue is decremented by a factor depending on the number of feedback cells, and the number of multicast and unicast cells in the current switching cycle.

    摘要翻译： 具有组播功能的ATM交换机使用反馈机制来解决争用。 组播网络从输入队列中读取N个单元，根据外部查找表复制多播单元并翻译其地址。 处理的N个单元被存储在临时缓冲器中，直到有关由于在前一个切换周期中的争用而被反馈的单元的数量（F）的信息可用。 旋转器将来自临时缓冲器的N-F个单元从输出网络的输入端定位，从而将来自临时缓冲器的单元分配给比反馈单元优先级低的优先级。 输出网络选择可以切换到目的地的单元，并将其传输到输出端口。 反馈由于竞争而不能切换的单元被反馈以在下一个切换周期中呈现用于输出网络的考虑。 同时，输入队列的指针根据反馈单元的数量以及当前切换周期中的组播和单播小区的数量而减少。

    Modification to a reservation ring mechanism for controlling contention in a broadband ISDN fast packet switch suitable for use in a local area network
    6.
    发明授权
    Modification to a reservation ring mechanism for controlling contention in a broadband ISDN fast packet switch suitable for use in a local area network 失效
    修改为适用于局域网的宽带ISDN快速分组交换机中的争用的保留环机制

    公开(公告)号：US5519698A

    公开(公告)日：1996-05-21

    申请号：US104458

    申请日：1993-08-09

    申请人： Joseph B. Lyles ,  Alan G. Bell

    发明人： Joseph B. Lyles ,  Alan G. Bell

    IPC分类号： H04L12/56 ,  H04Q11/04

    CPC分类号： H04L12/5601 ,  H04L49/107 ,  H04L49/1561 ,  H04L49/203 ,  H04Q11/0478 ,  H04L2012/5679 ,  H04L2012/5681

    摘要： A switching network having a sorting network followed by a plurality of routing networks for routing packets from a plurality of inputs to a plurality of outputs in accordance with destination addresses specified by the packets includes a reservation ring mechanism for resolving conflicts among inputs contending for access to identical outputs. This reservation ring mechanism performs a sequence of step and compare operations in top-to-bottom ring-like order during one or more arbitration cycles for granting contending inputs access to the outputs for which those inputs are contending in top-to-bottom order. Each of the routing networks can route packets from any input to any output, so up to k packets are routed to each output during each arbitration cycle, where k equals the number of routing networks that are employed.

    摘要翻译： 具有排序网络的交换网络，其后面是多个路由网络，用于根据由分组指定的目的地地址将分组从多个输入路由到多个输出，包括：预留环机制，用于解决争用访问的输入之间的冲突 相同的输出。 该保留环机制在一个或多个仲裁周期期间执行从上到下的环状命令中的步骤和比较操作的顺序，以允许竞争输入访问这些输入以从上到下的顺序竞争的输出。 每个路由网络可以将分组从任何输入路由到任何输出，因此在每个仲裁周期期间，k个分组被路由到每个输出，其中k等于所使用的路由网络的数量。

    Chuted, growable packet switching arrangement
    7.
    发明授权
    Chuted, growable packet switching arrangement 失效
    流水线，可扩展的分组交换机制

    公开(公告)号：US5345444A

    公开(公告)日：1994-09-06

    申请号：US954104

    申请日：1992-09-30

    申请人： Thomas J. Cloonan ,  Gaylord W. Richards

    发明人： Thomas J. Cloonan ,  Gaylord W. Richards

    IPC分类号： H04L12/56 ,  H04Q3/00 ,  H04Q3/52 ,  H04Q11/00 ,  H04Q11/04 ,  H04J14/08

    CPC分类号： H04L12/5601 ,  H04L49/1561 ,  H04L49/256 ,  H04L49/405 ,  H04Q11/0001 ,  H04Q11/0478 ,  H04L2012/5605 ,  H04L2012/5672 ,  H04L2012/5681 ,  H04Q11/0066

    摘要： A growable packet switching arrangement where the distribution network blocking probability is substantially reduced because the network has both switch links and chute links, and the network nodes include both a switching element interconnecting successive stage switch links and a plurality of non-switching, chute connections interconnecting successive stage chute links. A network node can transfer a packet, being received on a switch link, to any selected one of the chute connections of that node for transmission on a chute link. The network nodes are relatively simple and inexpensive because they store only the first few bits needed to route an ATM cell. The blocking probability is further reduced when the number of chutes per node is increased. The number of chutes may be based, for example, on the number of switch link inputs per node.

    摘要翻译： 由于网络具有交换链路和滑道链路，所以分布网络阻塞概率大大降低，并且网络节点包括互连连续级交换机链路的交换元件和互连的多个非交换式滑槽连接 连续阶段滑道链接。 网络节点可以将在交换机链路上接收的分组传送到该节点的任意一个滑槽连接，以在滑道链路上传输。 网络节点相对简单和便宜，因为它们仅存储路由ATM信元所需的前几位。 当每个节点的滑槽数量增加时，阻塞概率进一步降低。 滑槽的数量可以基于例如每个节点的切换链路输入的数量。

    LED pulse shaping circuit
    9.
    发明授权
    LED pulse shaping circuit 失效
    LED脉冲形状电路

    公开(公告)号：US5132553A

    公开(公告)日：1992-07-21

    申请号：US767350

    申请日：1991-09-30

    申请人： Stefan A. Siegel

    发明人： Stefan A. Siegel

    IPC分类号： H01L33/00 ,  H04L12/56

    CPC分类号： H04L12/5601 ,  H04L49/106 ,  H04L49/1561 ,  H04L49/256 ,  H04L49/405 ,  H04L2012/5605

    摘要： An LED pulse shaping circuit is disclosed which is capable of providing improved rise time (using current peaking) and fall time (using charge extraction). The pulse shaping circuit consists of a conventional differential current switch coupled to a pair of switching elements and resistance elements. A first switching element is activated at the beginning of a pulse to provide for an initially increased drive current to the LED, the value of a first resistance element used to determined the level of the increased drive current. The current peaking thus results in decreasing the rise time of the LED. The remaining switching element and resistance are utilized, in conjunction with the differential current switch, to provide a reverse current flow through the LED at the end of the pulse. The charge extraction thus results in decreasing the fall time of the LED.

    Switching cell for packet switching network
    10.
    发明授权
    Switching cell for packet switching network 失效
    分组交换网络的交换单元

    公开(公告)号：US5043980A

    公开(公告)日：1991-08-27

    申请号：US432921

    申请日：1989-11-07

    申请人： Chester M. Day, Jr. ,  James N. Giacopelli

    发明人： Chester M. Day, Jr. ,  James N. Giacopelli

    IPC分类号： H04L12/56 ,  H04Q3/68

    CPC分类号： H04L12/5601 ,  H04L49/106 ,  H04L49/1561 ,  H04L49/1592 ,  H04L49/405 ,  H04Q3/68 ,  H04L2012/5609

    摘要： A cell for use in a packet switching network. The cell comprises an input for receiving a packet including a destination address and first and second outputs. The cell includes a selection circuit for connecting the input with the first output or the second output depending on whether a specific bit occupying a predetermined position in the packet address is a logic "1" or a logic "0". Illustratively, the specific bit is the first bit after a start bit of the packer and each of the cells includes means for rotating the specific bit to the end of the address. This is especially useful for implementing a banyan network wherein the k.sup.th column of cells the routing decision is based on the k.sup.th most significant bit of the address, as the address bit rotation mechanism can be used to ensure that the first bit after the start bit of a packet is the k.sup.th most significant address bit. Preferably, each of the cells may be disabled in response to a disabling signal so that the input is connected to the first or second output independently of the logic value of the specific bit. This permits a packet switching network to be formed from interconnected horizontal and vertical stacks of chips wherein selected cells are disabled.

    摘要翻译： 用于分组交换网络的小区。 小区包括用于接收包含目的地地址和第一和第二输出的分组的输入。 单元包括用于将输入与第一输出或第二输出连接的选择电路，这取决于分组地址中占用预定位置的特定位是逻辑“1”还是逻辑“0”。 说明性地，特定位是封隔器的起始位之后的第一位，并且每个单元包括用于将特定位旋转到地址的末尾的装置。 这对于实现榕树网络尤其有用，其中第k列小区的路由决定是基于地址的第k个最高有效位，因为地址比特旋转机制可以用于确保起始位之后的第一比特 一个数据包是第k个最重要的地址位。 优选地，每个单元可以响应于禁用信号被禁用，使得输入与特定位的逻辑值无关地连接到第一或第二输出。 这允许分组交换网络由互连的水平和垂直堆栈的芯片形成，其中选择的小区被禁用。