Variable gain amplifier apparatus
    1.
    发明授权
    Variable gain amplifier apparatus 失效
    可变增益放大器装置

    公开(公告)号:US5625321A

    公开(公告)日:1997-04-29

    申请号:US547120

    申请日:1995-10-23

    CPC分类号: H03F3/62 H03G3/3052

    摘要: In a variable gain amplifier apparatus, wide input dynamic range can be secured and low noise characteristic can be obtained by employing first and second variable gain amplifiers have different noise characteristics and different saturation input levels and receive a same input signal. Output signals of the first and second variable gain amplifiers are added to each other to provide an output signal of the variable gain amplifier apparatus. Desired noise characteristic and saturation input level characteristic of the variable gain amplifier apparatus can be obtained by selecting the noise characteristics and the saturation input levels of the first and second variable gain amplifiers appropriately. This allows the variable gain amplifier apparatus to have a wide input dynamic range and low noise characteristic.

    摘要翻译: 在可变增益放大器装置中,通过采用具有不同噪声特性和不同饱和输​​入电平的第一和第二可变增益放大器,并且接收相同的输入信号,可以确保宽的输入动态范围并且可以获得低噪声特性。 将第一和第二可变增益放大器的输出信号彼此相加以提供可变增益放大器装置的输出信号。 可以通过适当地选择第一和第二可变增益放大器的噪声特性和饱和输入电平来获得可变增益放大器装置的期望噪声特性和饱和输入电平特性。 这允许可变增益放大器装置具有宽的输入动态范围和低噪声特性。

    Communication system and communication apparatus
    3.
    发明授权
    Communication system and communication apparatus 有权
    通信系统和通信设备

    公开(公告)号:US08089176B2

    公开(公告)日:2012-01-03

    申请号:US12333068

    申请日:2008-12-11

    IPC分类号: H02J1/00 H02J3/00 H04B3/54

    摘要: Disclosed herein is a communication system including: at least one power line communication apparatus connected via a general power line for supplying a commercial alternate current power; a communication terminal having a modem for power line communication, and a plurality of first coils having different directivities; and a coupling apparatus, connected to a power line, having a filter for attenuating an alternate current component of the power line, and a second coil arranged after the filter; wherein the communication terminal executes mutual communication with any of the power line communication apparatus connected via the general power line through proximity communication based on an electromagnetic coupling action that is generated between the plurality of first coils and the second coil when the communication terminal is brought to the proximity of a coupling surface of the coupling apparatus.

    摘要翻译: 本文公开了一种通信系统,包括:至少一个电力线通信装置,其经由用于提供商用交流电源的一般电力线连接; 具有用于电力线通信的调制解调器的通信终端和具有不同方向性的多个第一线圈; 以及连接到电力线的耦合装置,具有用于衰减电力线的交流分量的滤波器和布置在滤波器之后的第二线圈; 其中,所述通信终端通过基于在所述通信终端到达所述多个第一线圈与所述第二线圈之间产生的电磁耦合动作时,经由所述一般电力线路连接的所述电力线通信装置中的任一个进行相互通信 联接装置的联接表面的接近。

    Digital modulation circuit and method as well as digital demodulation circuit and method
    4.
    发明授权
    Digital modulation circuit and method as well as digital demodulation circuit and method 失效
    数字调制电路及方法以及数字解调电路及方法

    公开(公告)号:US07596187B2

    公开(公告)日:2009-09-29

    申请号:US12032170

    申请日:2008-02-15

    IPC分类号: H04L27/20

    CPC分类号: H04L27/18 H04L27/2071

    摘要: A mixer circuit accumulates I signal (digital signal of first channel) having its band limited by low-pass filter and first carrier signal to perform two-phase shift keying modulation thereon. An adder adds fundamental-wave component of bit clock signal BCK into Q signal (digital signal of second channel) having its band limited by the another low-pass filter to obtain a resultant added-up signal. Another mixer circuit accumulates the added-up signal and second carrier signal to perform two-phase shift keying modulation thereon. Output signals of the mixer circuits are input to another adder so that they may be added up to obtain a QPSK signal as a modulated quadrature signal. The QPSK signal contains frequency signals whose frequencies are a sum of bit clock frequency and carrier frequency and a difference between them. When demodulating, the carrier signal and the bit clock signal are reproduced using the frequency signals.

    摘要翻译: 混频器电路累积其频带被低通滤波器和第一载波信号限制的I信号(第一信道的数字信号),以对其进行两相移相键控调制。 加法器将位时钟信号BCK的基波分量加到其另一个低通滤波器的频带限制的Q信号(第二声道的数字信号)中,以获得合成的相加信号。 另一个混频器电路累积相加信号和第二载波信号,以对其进行两相移相键控调制。 混频器电路的输出信号被输入到另一个加法器,使得它们可以相加以获得作为调制正交信号的QPSK信号。 QPSK信号包含频率为位时钟频率和载波频率之和以及它们之间的差的频率信号。 当解调时,使用频率信号再现载波信号和位时钟信号。

    DIGITAL MODULATION CIRCUIT AND METHOD AS WELL AS DIGITAL DEMODULATION CIRCUIT AND METHOD
    5.
    发明申请
    DIGITAL MODULATION CIRCUIT AND METHOD AS WELL AS DIGITAL DEMODULATION CIRCUIT AND METHOD 失效
    数字调制电路和方法作为数字解调电路和方法

    公开(公告)号:US20080136546A1

    公开(公告)日:2008-06-12

    申请号:US12032170

    申请日:2008-02-15

    IPC分类号: H03C3/00

    CPC分类号: H04L27/18 H04L27/2071

    摘要: A mixer circuit accumulates I signal (digital signal of first channel) having its band limited by low-pass filter and first carrier signal to perform two-phase shift keying modulation thereon. An adder adds fundamental-wave component of bit clock signal BCK into Q signal (digital signal of second channel) having its band limited by the another low-pass filter to obtain a resultant added-up signal. Another mixer circuit accumulates the added-up signal and second carrier signal to perform two-phase shift keying modulation thereon. Output signals of the mixer circuits are input to another adder so that they may be added up to obtain a QPSK signal as a modulated quadrature signal. The QPSK signal contains frequency signals whose frequencies are a sum of bit clock frequency and carrier frequency and a difference between them. When demodulating, the carrier signal and the bit clock signal are reproduced using the frequency signals.

    摘要翻译: 混频器电路累积其频带由低通滤波器和第一载波信号限制的I信号(第一信道的数字信号),以对其进行两相移相键控调制。 加法器将位时钟信号BCK的基波分量加到其另一个低通滤波器的频带限制的Q信号(第二声道的数字信号)中,以获得合成的相加信号。 另一个混频器电路累积相加信号和第二载波信号,以对其进行两相移相键控调制。 混频器电路的输出信号被输入到另一个加法器,使得它们可以相加以获得作为调制正交信号的QPSK信号。 QPSK信号包含频率为位时钟频率和载波频率之和以及它们之间的差的频率信号。 当解调时,使用频率信号再现载波信号和位时钟信号。

    Synchronizing detecting circuit for a digital broadcasting receiver
    6.
    发明授权
    Synchronizing detecting circuit for a digital broadcasting receiver 失效
    用于数字广播接收机的同步检测电路

    公开(公告)号:US4800578A

    公开(公告)日:1989-01-24

    申请号:US93024

    申请日:1987-08-27

    申请人: Kazuji Sasaki

    发明人: Kazuji Sasaki

    IPC分类号: H04J3/06 H04L7/04 H04L7/08

    CPC分类号: H04L7/042

    摘要: A synchronizing detecting circuit for a digital broadcasting receiver arranged such that serial sync. words of first and second series derived from an output of a 4-phase PSK demodulator (5) are respectively converted into first and second parallel sync. words, all bits of one word of the first and second parallel sync. data are inverted to bits of high level, even-numbered bits (or odd-numbered bits) are exchanged to one another and then supplied resepctively to first and second AND cirucits (38) and (39) and the sync. word is detected from at least one of the AND circuits to thereby detect a synchronizing signal at high probability.

    Communication system and communication apparatus
    7.
    发明授权
    Communication system and communication apparatus 有权
    通信系统和通信设备

    公开(公告)号:US08390143B2

    公开(公告)日:2013-03-05

    申请号:US13308714

    申请日:2011-12-01

    IPC分类号: H02J1/00 H02J3/00 H04B3/54

    摘要: Disclosed herein is a communication system including: at least one power line communication apparatus connected via a general power line for supplying a commercial alternate current power; a communication terminal having a modem for power line communication, and a plurality of first coils having different directivities; and a coupling apparatus, connected to a power line, having a filter for attenuating an alternate current component of the power line, and a second coil arranged after the filter; wherein the communication terminal executes mutual communication with any of the power line communication apparatus connected via the general power line through proximity communication based on an electromagnetic coupling action that is generated between the plurality of first coils and the second coil when the communication terminal is brought to the proximity of a coupling surface of the coupling apparatus.

    摘要翻译: 本文公开了一种通信系统,包括:至少一个电力线通信装置,其经由用于提供商用交流电源的一般电力线连接; 具有用于电力线通信的调制解调器的通信终端和具有不同方向性的多个第一线圈; 以及连接到电力线的耦合装置,具有用于衰减电力线的交流分量的滤波器和布置在滤波器之后的第二线圈; 其中,所述通信终端通过基于在所述通信终端到达所述多个第一线圈与所述第二线圈之间产生的电磁耦合动作时,经由所述一般电力线路连接的所述电力线通信装置中的任一个进行相互通信 联接装置的联接表面的接近。

    COMMUNICATION SYSTEM AND COMMUNICATION APPARATUS
    8.
    发明申请
    COMMUNICATION SYSTEM AND COMMUNICATION APPARATUS 审中-公开
    通信系统和通信设备

    公开(公告)号:US20090143009A1

    公开(公告)日:2009-06-04

    申请号:US12270001

    申请日:2008-11-13

    申请人: Kazuji Sasaki

    发明人: Kazuji Sasaki

    IPC分类号: H04B5/00

    CPC分类号: H04B5/0012

    摘要: A communication system for carrying out noncontact transmissions of a close-coupled type by adoption of an electrostatic capacitive coupling method, the communication system includes: a signal transmitting apparatus having a signal transmitting electrode and a section configured to apply a baseband signal representing transmitted data to the signal transmitting electrode as a transmitted signal; and a signal receiving apparatus having a signal receiving electrode and a signal demodulation section configured to carry out a binary conversion demodulation process on a received signal appearing at the signal receiving electrode to reproduce the baseband signal, wherein, when the signal transmitting electrode and the signal receiving electrode closely couple to each other, an electrostatic capacitive coupler equivalent to a capacitor coupling circuit is formed and the transmitted signal is propagated through a small capacitance created between the signal transmitting electrode and the signal receiving electrode.

    摘要翻译: 一种用于通过采用静电电容耦合方法进行接合型非接触传输的通信系统,所述通信系统包括:信号发送装置,具有信号发送电极和被配置为将表示发送数据的基带信号应用于 信号发送电极作为发送信号; 以及信号接收装置,具有信号接收电极和信号解调部,被配置为对出现在信号接收电极处的接收信号进行二进制转换解调处理,以再现基带信号,其中,当信号发送电极和信号 接收电极彼此紧密耦合,形成等效于电容器耦合电路的静电电容耦合器,并且传输的信号通过在信号发射电极和信号接收电极之间产生的小电容传播。

    Digital modulation circuit and method as well as digital demodulation circuit and method
    9.
    发明申请
    Digital modulation circuit and method as well as digital demodulation circuit and method 失效
    数字调制电路及方法以及数字解调电路及方法

    公开(公告)号:US20050111582A1

    公开(公告)日:2005-05-26

    申请号:US10960120

    申请日:2004-10-08

    CPC分类号: H04L27/18 H04L27/2071

    摘要: A mixer circuit accumulates I signal (digital signal of first channel) having its band limited by low-pass filter and first carrier signal to perform two-phase shift keying modulation thereon. An adder adds fundamental-wave component of bit clock signal BCK into Q signal (digital signal of second channel) having its band limited by the another low-pass filter to obtain a resultant added-up signal. Another mixer circuit accumulates the added-up signal and second carrier signal to perform two-phase shift keying modulation thereon. Output signals of the mixer circuits are input to another adder so that they may be added up to obtain a QPSK signal as a modulated quadrature signal. The QPSK signal contains frequency signals whose frequencies are a sum of bit clock frequency and carrier frequency and a difference between them. When demodulating, the carrier signal and the bit clock signal are reproduced using the frequency signals.

    摘要翻译: 混频器电路累积其频带由低通滤波器和第一载波信号限制的I信号(第一信道的数字信号),以对其进行两相移相键控调制。 加法器将位时钟信号BCK的基波分量加到其另一个低通滤波器的频带限制的Q信号(第二声道的数字信号)中,以获得合成的相加信号。 另一个混频器电路累积相加信号和第二载波信号,以对其进行两相移相键控调制。 混频器电路的输出信号被输入到另一个加法器,使得它们可以相加以获得作为调制正交信号的QPSK信号。 QPSK信号包含频率为位时钟频率和载波频率之和以及它们之间的差的频率信号。 当解调时,使用频率信号再现载波信号和位时钟信号。

    Digital modulation circuit and method as well as digital demodulation circuit and method
    10.
    发明授权
    Digital modulation circuit and method as well as digital demodulation circuit and method 失效
    数字调制电路及方法以及数字解调电路及方法

    公开(公告)号:US07903760B2

    公开(公告)日:2011-03-08

    申请号:US10960120

    申请日:2004-10-08

    IPC分类号: H04L27/00

    CPC分类号: H04L27/18 H04L27/2071

    摘要: A mixer circuit accumulates I signal (digital signal of first channel) having its band limited by low-pass filter and first carrier signal to perform two-phase shift keying modulation thereon. An adder adds fundamental-wave component of bit clock signal BCK into Q signal (digital signal of second channel) having its band limited by the another low-pass filter to obtain a resultant added-up signal. Another mixer circuit accumulates the added-up signal and second carrier signal to perform two-phase shift keying modulation thereon. Output signals of the mixer circuits are input to another adder so that they may be added up to obtain a QPSK signal as a modulated quadrature signal. The QPSK signal contains frequency signals whose frequencies are a sum of bit clock frequency and carrier frequency and a difference between them. When demodulating, the carrier signal and the bit clock signal are reproduced using the frequency signals.

    摘要翻译: 混频器电路累积其频带由低通滤波器和第一载波信号限制的I信号(第一信道的数字信号),以对其进行两相移相键控调制。 加法器将位时钟信号BCK的基波分量加到其另一个低通滤波器的频带限制的Q信号(第二声道的数字信号)中,以获得合成的相加信号。 另一个混频器电路累积相加信号和第二载波信号,以对其进行两相移相键控调制。 混频器电路的输出信号被输入到另一个加法器,使得它们可以相加以获得作为调制正交信号的QPSK信号。 QPSK信号包含频率为位时钟频率和载波频率之和以及它们之间的差的频率信号。 当解调时,使用频率信号再现载波信号和位时钟信号。