公开(公告)号：US20050235067A1

公开(公告)日：2005-10-20

申请号：US10828872

申请日：2004-04-20

申请人： Kenneth Creta ,  Aaron Spink ,  Lance Hacking ,  Sridhar Muthrasanallur ,  Jasmin Ajanovic

发明人： Kenneth Creta ,  Aaron Spink ,  Lance Hacking ,  Sridhar Muthrasanallur ,  Jasmin Ajanovic

IPC分类号： G06F13/14 ,  G06F13/40

CPC分类号： G06F13/4027

摘要： Systems and methods of processing write transactions provide for combining write transactions on an input/output (I/O) hub according to a protocol between the I/O hub and a processor. Data associated with the write transactions can be flushed to an I/O device without the need for proprietary software and specialized registers within the I/O device.

摘要翻译： 处理写事务的系统和方法提供了根据I / O集线器和处理器之间的协议在输入/输出（I / O）集线器上组合写事务。 与写入事务相关的数据可以刷新到I / O设备，而不需要I / O设备内的专有软件和专用寄存器。

公开(公告)号：US20050251611A1

公开(公告)日：2005-11-10

申请号：US10832607

申请日：2004-04-27

申请人： Kenneth Creta ,  Robert Blankenship ,  Sridhar Muthrasanallur ,  Jasmin Ajanovic

发明人： Kenneth Creta ,  Robert Blankenship ,  Sridhar Muthrasanallur ,  Jasmin Ajanovic

IPC分类号： G06F13/36 ,  G06F13/38 ,  G06F13/42

CPC分类号： G06F13/387 ,  G06F13/4265

摘要： In various embodiments, the present invention includes a method for receiving a transaction having first header information from a first peer device at a first agent of a coherent system, inserting second header information onto the transaction, and routing the transaction to a second peer device using the second header information. In one such embodiment, the first header may be a header of a first protocol and the second header may be of a different protocol that is used to tunnel the transaction through the coherent system.

摘要翻译： 在各种实施例中，本发明包括一种用于在相干系统的第一代理处从第一对等设备接收具有第一报头信息的交易的方法，将第二报头信息插入事务，并且使用 第二标题信息。 在一个这样的实施例中，第一报头可以是第一协议的报头，并且第二报头可以是用于通过相干系统隧道交易的不同协议。

公开(公告)号：US20130132683A1

公开(公告)日：2013-05-23

申请号：US13713614

申请日：2012-12-13

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David J. Harriman ,  Mark B. Rosenbluth ,  Ajay V. Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert G. Blankenship ,  Ohad Falik ,  Avi Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David J. Harriman ,  Mark B. Rosenbluth ,  Ajay V. Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert G. Blankenship ,  Ohad Falik ,  Avi Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F12/08

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus forenhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

公开(公告)号：US08099523B2

公开(公告)日：2012-01-17

申请号：US13073219

申请日：2011-03-28

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F3/00

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

摘要翻译： 这里描述了用于增强/扩展串行点对点互连架构的方法和装置，例如外围组件互连Express（PCIe）。 提供了时间和地点缓存提示和预取提示，以改进系统范围的缓存和预取。 包括用于仲裁系统设备/资源之间的所有权的原子操作的消息代码，以便有效地访问/拥有共享数据。 提供的松散的事务排序，同时将对应的事务优先级保持到内存位置，以确保数据完整性和高效的内存访问。 包括有功功率子状态及其设置以允许更有效的电源管理。 并且，提供设备本地存储器在主机地址空间中的缓存以及设备本地存储器地址空间中的系统存储器的缓存，以提高存储器访问的带宽和延迟。

公开(公告)号：US20110238882A1

公开(公告)日：2011-09-29

申请号：US13073149

申请日：2011-03-28

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Avi (Abraham) Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Avi (Abraham) Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F13/14

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

公开(公告)号：US20110072164A1

公开(公告)日：2011-03-24

申请号：US12883781

申请日：2010-09-16

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Avi (Abraham) Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Avi (Abraham) Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F3/00 ,  G06F13/42

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

公开(公告)号：US20080215822A1

公开(公告)日：2008-09-04

申请号：US11933178

申请日：2007-10-31

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Avi (Abraham) Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Avi (Abraham) Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F12/08

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

摘要翻译： 这里描述了用于增强/扩展串行点对点互连架构的方法和装置，例如外围组件互连Express（PCIe）。 提供了时间和地点缓存提示和预取提示，以改进系统范围的缓存和预取。 包括用于仲裁系统设备/资源之间的所有权的原子操作的消息代码，以便有效地访问/拥有共享数据。 提供的松散的事务排序，同时将对应的事务优先级保持到内存位置，以确保数据完整性和高效的内存访问。 包括有功功率子状态及其设置以允许更有效的电源管理。 并且，提供设备本地存储器在主机地址空间中的缓存以及设备本地存储器地址空间中的系统存储器的缓存，以提高存储器访问的带宽和延迟。

公开(公告)号：US08549183B2

公开(公告)日：2013-10-01

申请号：US12883781

申请日：2010-09-16

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F3/00 ,  G06F5/00

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

公开(公告)号：US08473642B2

公开(公告)日：2013-06-25

申请号：US13198559

申请日：2011-08-04

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F3/00 ,  G06F12/00

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

摘要翻译： 这里描述了用于增强/扩展串行点对点互连架构的方法和装置，例如外围组件互连Express（PCIe）。 提供了时间和地点缓存提示和预取提示，以改进系统范围的缓存和预取。 包括用于仲裁系统设备/资源之间的所有权的原子操作的消息代码，以便有效地访问/拥有共享数据。 提供的松散的事务排序，同时将对应的事务优先级保持到内存位置，以确保数据完整性和高效的内存访问。 包括有功功率子状态及其设置以允许更有效的电源管理。 并且，提供设备本地存储器在主机地址空间中的缓存以及设备本地存储器地址空间中的系统存储器的缓存，以提高存储器访问的带宽和延迟。

公开(公告)号：US08230119B2

公开(公告)日：2012-07-24

申请号：US12861439

申请日：2010-08-23

申请人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

发明人： Jasmin Ajanovic ,  Mahesh Wagh ,  Prashant Sethi ,  Debendra Das Sharma ,  David Harriman ,  Mark Rosenbluth ,  Ajay Bhatt ,  Peter Barry ,  Scott Dion Rodgers ,  Anil Vasudevan ,  Sridhar Muthrasanallur ,  James Akiyama ,  Robert Blankenship ,  Ohad Falik ,  Abraham Mendelson ,  Ilan Pardo ,  Eran Tamari ,  Eliezer Weissmann ,  Doron Shamia

IPC分类号： G06F3/00 ,  G06F13/20

CPC分类号： G06F12/0831 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F12/0815 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4265 ,  G06F2212/621 ,  H04L12/66 ,  Y02D10/126 ,  Y02D10/151

摘要： A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

摘要翻译： 这里描述了用于增强/扩展串行点对点互连架构的方法和装置，例如外围组件互连Express（PCIe）。 提供了时间和地点缓存提示和预取提示，以改进系统范围的缓存和预取。 包括用于仲裁系统设备/资源之间的所有权的原子操作的消息代码，以便有效地访问/拥有共享数据。 提供的松散的事务排序，同时将对应的事务优先级保持到内存位置，以确保数据完整性和高效的内存访问。 包括有功功率子状态及其设置以允许更有效的电源管理。 并且，提供设备本地存储器在主机地址空间中的缓存以及设备本地存储器地址空间中的系统存储器的缓存，以提高存储器访问的带宽和延迟。