Method for manufacturing a lithographic reticle for transferring an integrated circuit design to a semiconductor wafer
    1.
    发明授权
    Method for manufacturing a lithographic reticle for transferring an integrated circuit design to a semiconductor wafer 有权
    用于制造用于将集成电路设计转移到半导体晶片的光刻掩模版的方法

    公开(公告)号:US06649452B2

    公开(公告)日:2003-11-18

    申请号:US10085960

    申请日:2002-02-28

    IPC分类号: H01L2182

    CPC分类号: G03F1/78 G03F1/36

    摘要: A lithographic reticle with subresolution features in the design-pattern is used to control critical dimensions in a semiconductor manufacturing process. After the location of design and processing features is determined, subresolution features are formed in areas devoid of design and processing features. The subresolution features can substantially fill all of the area devoid of design processing features or, instead, selectively fill portions of the area. In one embodiment, the width of the area devoid of design and processing features is less than two times the width of a feature. The presence of the subresolution features results in improved control of small dimensions of features in semiconductor processing, thereby increasing yield and device performance.

    摘要翻译: 在设计图案中具有亚分辨特征的光刻掩模版用于控制半导体制造工艺中的关键尺寸。 在确定设计和处理特征的位置之后,在不具有设计和处理特征的区域中形成分解特征。 分解特征可以基本上填满没有设计处理特征的所有区域,或者相反地,选择性地填充该区域的部分。 在一个实施例中,没有设计和处理特征的区域的宽度小于特征宽度的两倍。 分解特征的存在导致对半导体处理中的特征的小尺寸的改进的控制,从而增加产量和装置性能。

    Non-resolving mask tiling method for flare reduction
    2.
    发明授权
    Non-resolving mask tiling method for flare reduction 失效
    不分解掩模平铺方法

    公开(公告)号:US06989229B2

    公开(公告)日:2006-01-24

    申请号:US10400347

    申请日:2003-03-27

    IPC分类号: G03F7/20

    摘要: Photoresist on a wafer is exposed using tiles on a mask that improve flare performance. Features that are not to be exposed on the photoresist correspond to features on the mask. The various features are surrounded by other features that vary and thus affect flare differently. Selected features have tiles added nearby but also far enough away to improve uniformity in the effects of flare on the various features that are intended to be present in the photoresist. The tiles are made either very small in width or partially absorbing so that the tiles are not resolved in the photoresist. Thus the tiles reduce flare but do not alter the desired pattern in the photoresist.

    摘要翻译: 晶片上的光致抗蚀剂使用掩模上的瓷砖进行曝光,从而改善光斑性能。 在光刻胶上不暴露的特征对应于掩模上的特征。 各种特征被不同的其他特征所包围,从而不同地影响耀斑。 选定的特征具有附近附近的瓷砖,但也足够远,以改善光斑对预期存在于光致抗蚀剂中的各种特征的影响的均匀性。 瓷砖制成的宽度非常小或部分吸收,使得瓷砖未在光致抗蚀剂中分辨。 因此,瓷砖减少了光斑,但不改变光刻胶中所需的图案。

    Seal plug
    3.
    发明授权
    Seal plug 失效
    密封塞

    公开(公告)号:US4267401A

    公开(公告)日:1981-05-12

    申请号:US921825

    申请日:1978-07-03

    摘要: A seal plug for conduits is disclosed having a plug core including at least one radially-expansible seal member for sealing the conduit in which it is disposed, while permitting passage of cables or the like therethrough. Until required for the cable or cables, the passages in the seal plug are closed by removable pin inserts, retainer means being provided to hold the inserts in place. The plug includes longitudinal compression means to bring the seal member into sealing contact with the conduit wall. Each passage may open to the circumference of the respective seal member via slits to permit sideways insertion of the cable therein.

    摘要翻译: 公开了一种用于导管的密封塞,其具有插塞芯,该插塞芯包括至少一个径向可扩张的密封构件,用于密封其中设置的导管,同时允许电缆等穿过其中。 在电缆或电缆需要之前,密封塞中的通道被可移除的针插入件封闭,保持器装置被设置成将插入件保持在适当的位置。 塞子包括纵向压缩装置,以使密封件与导管壁密封接触。 每个通道可以经由狭缝打开到相应的密封构件的圆周,以允许电缆在其中侧向插入。