System and method for extending the overload range of a sigma delta ADC system by providing over-range quantization levels
    1.
    发明授权
    System and method for extending the overload range of a sigma delta ADC system by providing over-range quantization levels 有权
    通过提供超范围量化级别来扩展Σ-ΔADC系统的过载范围的系统和方法

    公开(公告)号:US08212699B1

    公开(公告)日:2012-07-03

    申请号:US12795579

    申请日:2010-06-07

    IPC分类号: H03M3/00

    CPC分类号: H03M3/348 H03M3/424 H03M3/454

    摘要: Examples of a system and method for sigma-delta analog-to-digital conversion of an electrical input signal are disclosed. An electrical input signal is received. A filtered analog signal is provided based on the electrical input signal and an analog feedback signal. A digital representation of the filtered analog signal is provided, the digital representation being one of K quantization levels, wherein K is a positive integer between 2L and 2L+1, L being a positive integer. The analog feedback signal is obtained based on the digital representation.

    摘要翻译: 公开了用于电输入信号的Σ-Δ模数转换的系统和方法的示例。 接收电输入信号。 基于电输入信号和模拟反馈信号提供经滤波的模拟信号。 提供经过滤波的模拟信号的数字表示,数字表示是K个量化级之一,其中K是2L和2L + 1之间的正整数,L是正整数。 基于数字表示获得模拟反馈信号。

    Bandpass multi-bit sigma-delta analog to digital conversion
    2.
    发明授权
    Bandpass multi-bit sigma-delta analog to digital conversion 有权
    带通多位Σ-Δ模数转换

    公开(公告)号:US07973689B2

    公开(公告)日:2011-07-05

    申请号:US12560288

    申请日:2009-09-15

    IPC分类号: H03M3/00

    CPC分类号: H03M3/348 H03M3/424 H03M3/454

    摘要: Examples of a system and method for sigma-delta analog-to-digital conversion of an electrical input signal are disclosed. A bandpass-filtered signal based on an electrical input signal and an analog feedback signal may be provided. A multi-bit digital representation of the bandpass-filtered signal may be provided. An analog representation of the multi-bit digital representation may be provided. A return-to-zero (RTZ) carving operation may be performed on the analog representation to obtain the analog feedback signal.

    摘要翻译: 公开了用于电输入信号的Σ-Δ模数转换的系统和方法的示例。 可以提供基于电输入信号和模拟反馈信号的带通滤波信号。 可以提供带通滤波信号的多位数字表示。 可以提供多比特数字表示的模拟表示。 可以对模拟表示执行归零(RTZ)雕刻操作以获得模拟反馈信号。

    BANDPASS MULTI-BIT SIGMA-DELTA ANALOG TO DIGITAL CONVERSION
    3.
    发明申请
    BANDPASS MULTI-BIT SIGMA-DELTA ANALOG TO DIGITAL CONVERSION 有权
    BANDPASS多位SIGMA-DELTA模拟到数字转换

    公开(公告)号:US20100066578A1

    公开(公告)日:2010-03-18

    申请号:US12560288

    申请日:2009-09-15

    IPC分类号: H03M3/00

    CPC分类号: H03M3/348 H03M3/424 H03M3/454

    摘要: Examples of a system and method for sigma-delta analog-to-digital conversion of an electrical input signal are disclosed. A bandpass-filtered signal based on an electrical input signal and an analog feedback signal may be provided. A multi-bit digital representation of the bandpass-filtered signal may be provided. An analog representation of the multi-bit digital representation may be provided. A return-to-zero (RTZ) carving operation may be performed on the analog representation to obtain the analog feedback signal.

    摘要翻译: 公开了用于电输入信号的Σ-Δ模数转换的系统和方法的示例。 可以提供基于电输入信号和模拟反馈信号的带通滤波信号。 可以提供带通滤波信号的多位数字表示。 可以提供多比特数字表示的模拟表示。 可以对模拟表示执行归零(RTZ)雕刻操作以获得模拟反馈信号。

    Multi-channel filtering system for transceiver architectures
    4.
    发明授权
    Multi-channel filtering system for transceiver architectures 有权
    用于收发器架构的多通道滤波系统

    公开(公告)号:US07155193B2

    公开(公告)日:2006-12-26

    申请号:US10806682

    申请日:2004-03-22

    IPC分类号: H04B1/38

    CPC分类号: H04B1/28 H04B1/406

    摘要: A multi-channel filtering system for use with a transceiver includes a front-end multi-pole, multi-throw switch, a back-end multi-pole, multi-throw switch, and a plurality of filters. The front-end switch includes a receive pole, a transmit pole, and a plurality of switch throws. The back-end switch also includes a receive pole, a transmit pole, and a plurality of switch throws. Each of the plurality of filters has first and second ports, each first port coupled to one of the switch throws of the front-end switch, and each second port coupled to one of the switch throws of the back-end switch. Using this configuration, filters of differing bandwidths can be switched in during signal reception and/or transmission, thereby tailoring the communication rate to the particular conditions.

    摘要翻译: 用于收发器的多通道滤波系统包括前端多极,多掷开关,后端多极,多掷开关和多个滤波器。 前端开关包括接收极,发射极和多个开关掷。 后端开关还包括接收极,发射极和多个开关掷。 多个滤波器中的每一个具有第一和第二端口,每个第一端口耦合到前端开关的开关引脚之一,并且每个第二端口耦合到后端开关的一个开关引脚。 使用该配置,可以在信号接收和/或传输期间切换不同带宽的滤波器,从而根据特定条件定制通信速率。

    Apparatus and method for calibration of gain and/or phase imbalance and/or DC offset in a communication system
    5.
    发明授权
    Apparatus and method for calibration of gain and/or phase imbalance and/or DC offset in a communication system 有权
    用于在通信系统中校准增益和/或相位不平衡和/或DC偏移的装置和方法

    公开(公告)号:US07974593B2

    公开(公告)日:2011-07-05

    申请号:US12575455

    申请日:2009-10-07

    IPC分类号: H04B1/06 H04K3/00

    摘要: An example of a radio frequency (RF) transmitter system for communication may include a transmit pre-distortion module configured to provide a second transmit calibration signal during a transmit calibration mode based on a first transmit calibration signal and one or more transmit calibration adjustment signals. The one or more transmit calibration adjustment signals may include an offset parameter associated with DC offset and an imbalance parameter associated with at least one of gain and phase imbalances. The system may include a transmit channel frequency converter coupled to the transmit pre-distortion module. The transmit channel frequency converter may be configured to provide a fourth transmit calibration signal during the transmit calibration mode based on a third transmit calibration signal and a transmit reference signal.

    摘要翻译: 用于通信的射频(RF)发射机系统的示例可以包括被配置为在发射校准模式期间基于第一发射校准信号和一个或多个发射校准调整信号来提供第二发射校准信号的发射预失真模块。 一个或多个发射校准调整信号可以包括与DC偏移相关联的偏移参数和与增益和相位不平衡中的至少一个相关联的不平衡参数。 该系统可以包括耦合到发射预失真模块的发射信道频率转换器。 发射信道频率转换器可以被配置为基于第三发射校准信号和发射参考信号在发射校准模式期间提供第四发射校准信号。

    Highly integrated, high-speed, low-power serdes and systems
    6.
    发明授权
    Highly integrated, high-speed, low-power serdes and systems 有权
    高度集成,高速,低功耗的serdes和系统

    公开(公告)号:US07848367B2

    公开(公告)日:2010-12-07

    申请号:US11896162

    申请日:2007-08-30

    IPC分类号: H04J3/02

    摘要: High-speed, high-performance, low-power transponders, serializers and deserializers are disclosed. A serializer may include a serdes framer interface (SFI) circuit, a clock multiplier unit, and a multiplexing circuit. A deserializer may include an input receiver circuit for receiving and adjusting an input data signal, a clock and data recovery circuit (CDR) for recovering clock and data signals, a demultiplexing circuit for splitting one or more data channels into a higher number of data channels, and a serdes framer interface (SFI) circuit for generating a reference channel and generating output data channels to be sent to a framer. The input receiver circuit may include a limiting amplifier. Each of the serializer and deserializer may further include a pseudo random pattern generator and error checker unit. The serializer and deserializer each may be integrated into its respective semiconductor chip or both may be integrated into a single semiconductor chip.

    摘要翻译: 公开了高速,高性能,低功率转发器,串行器和解串器。 串行器可以包括serdes成帧器接口(SFI)电路,时钟乘法器单元和复用电路。 解串器可以包括用于接收和调整输入数据信号的输入接收器电路,用于恢复时钟和数据信号的时钟和数据恢复电路(CDR),用于将一个或多个数据信道分成更多数量的数据信道的解复用电路 以及用于产生参考信道并产生要发送到成帧器的输出数据信道的Serdes成帧器接口(SFI)电路。 输入接收机电路可以包括限幅放大器。 串行器和解串器中的每一个还可以包括伪随机模式发生器和错误检查器单元。 串行器和解串器各自可以集成到其相应的半导体芯片中,或者两者可以集成到单个半导体芯片中。

    Baseband signal carrier recovery of a suppressed carrier modulation signal
    7.
    发明授权
    Baseband signal carrier recovery of a suppressed carrier modulation signal 有权
    抑制载波调制信号的基带信号载波恢复

    公开(公告)号:US06707863B1

    公开(公告)日:2004-03-16

    申请号:US09305139

    申请日:1999-05-04

    IPC分类号: H03D324

    CPC分类号: H04L27/3827 H04L27/3809

    摘要: A multidetector (40) circuit for use in a plurality of carrier recovery systems (10, 70) for recovery for a suppressed carrier modulated signal. The multidetector (40) receives demodulated, in-phase x and quadrature phase y components of a baseband signal (sn(t)) and generates output signals for use in a plurality of carrier recovery systems (10, 70). The multidetector (40) generates a lock detection signal that varies primarily in accordance with a lock signal x2y2 and a fourth-order amplitude detection signal (x2+y2)2 for use in either system. The multidetector particularly generates a phase error signal xy(x2−y2) for use in a Costas carrier recovery system (10). The multidetector also generates a second-order amplitude detection signal (x2+y2) for use in either system which can be used to adjust the amplitude of the incoming, modulated signal in order to control the loop gain of the carrier recovery phase locked loop.

    摘要翻译: 一种用于多个载波恢复系统(10,70)中用于恢复被抑制的载波调制信号的多检测器(40)电路。 多检测器(40)接收基带信号(sn(t))的解调的同相x和正交相位y分量,并产生用于多个载波恢复系统(10,70)的输出信号。 多检测器(40)产生主要根据锁定信号x 2 y 2和四阶振幅检测信号(x 2 + y 2)<2>而变化的锁定检测信号,用于 在任一系统中使用。 多检测器特别产生用于科斯塔斯载波恢复系统(10)中的相位误差信号xy(x 2 -y 2)。 多检测器还产生用于任一系统的二阶振幅检测信号(x 2 + y 2),该信号可用于调节输入调制信号的振幅,以便控制 载波恢复锁相环。

    Apparatus and method for calibration of gain and/or phase imbalance and/or DC offset in a communication system
    8.
    发明授权
    Apparatus and method for calibration of gain and/or phase imbalance and/or DC offset in a communication system 有权
    用于在通信系统中校准增益和/或相位不平衡和/或DC偏移的装置和方法

    公开(公告)号:US07965988B2

    公开(公告)日:2011-06-21

    申请号:US12575458

    申请日:2009-10-07

    IPC分类号: H04B1/38 H04K3/00

    摘要: An example of a method for off-line calibration of a radio frequency (RF) communication system may include one or more of the following: enabling an off-line calibration mode for an RF communication system; generating an off-line calibration signal; applying to a frequency converter a first off-line calibration signal corresponding to the generated off-line calibration signal; translating the first off-line calibration signal into a second off-line calibration signal; evaluating one or more calibration adjustment signals associated with the calibration signal to reduce error in the communication system, wherein the one or more calibration adjustment signals may include an offset parameter associated with DC offset and an imbalance parameter associated with at least one of gain and phase imbalances; storing one or more calibration adjustment signals; disabling the off-line calibration mode; applying a communication signal; and adjusting the communication signal based on the stored one or more calibration adjustment signals.

    摘要翻译: 用于射频(RF)通信系统的离线校准的方法的示例可以包括以下中的一个或多个:启用用于RF通信系统的离线校准模式; 产生离线校准信号; 向频率转换器施加对应于所生成的离线校准信号的第一离线校准信号; 将所述第一离线校准信号转换为第二离线校准信号; 评估与所述校准信号相关联的一个或多个校准调节信号以减少所述通信系统中的误差,其中所述一个或多个校准调整信号可以包括与DC偏移相关联的偏移参数和与增益和相位中的至少一个相关联的不平衡参数 不平衡 存储一个或多个校准调整信号; 禁用离线校准模式; 应用通信信号; 以及基于所存储的一个或多个校准调整信号来调整通信信号。

    APPARATUS AND METHOD FOR CALIBRATION OF GAIN AND/OR PHASE IMBALANCE AND/OR DC OFFSET IN A COMMUNICATION SYSTEM
    9.
    发明申请
    APPARATUS AND METHOD FOR CALIBRATION OF GAIN AND/OR PHASE IMBALANCE AND/OR DC OFFSET IN A COMMUNICATION SYSTEM 有权
    用于在通信系统中校准增益和/或相位不平衡和/或直流偏移的装置和方法

    公开(公告)号:US20100022199A1

    公开(公告)日:2010-01-28

    申请号:US12575457

    申请日:2009-10-07

    IPC分类号: H04B1/40

    摘要: An example of a radio frequency (RF) receiver system for communication may include a receive channel frequency converter configured to provide a second receive calibration signal during a receive calibration mode based on a first receive calibration signal and a receive reference signal. The system may include a receive pre-distortion module coupled to the receive channel frequency converter. The receive pre-distortion module may be configured to provide a fourth receive calibration signal during the receive calibration mode based on a third receive calibration signal and one or more receive calibration adjustment signals. The one or more receive calibration adjustment signals may comprise an offset parameter associated with DC offset and an imbalance parameter associated with at least one of gain and phase imbalances.

    摘要翻译: 用于通信的射频(RF)接收机系统的示例可以包括接收信道频率转换器,其被配置为在基于第一接收校准信号和接收参考信号的接收校准模式期间提供第二接收校准信号。 该系统可以包括耦合到接收信道频率转换器的接收预失真模块。 接收预失真模块可以被配置为在接收校准模式期间基于第三接收校准信号和一个或多个接收校准调整信号来提供第四接收校准信号。 一个或多个接收校准调整信号可以包括与DC偏移相关联的偏移参数和与增益和相位不平衡中的至少一个相关联的不平衡参数。

    FRACTIONAL-N SYNTHESIZED CHIRP GENERATOR
    10.
    发明申请
    FRACTIONAL-N SYNTHESIZED CHIRP GENERATOR 有权
    分类合成CHIRP发生器

    公开(公告)号:US20080284531A1

    公开(公告)日:2008-11-20

    申请号:US12122635

    申请日:2008-05-16

    IPC分类号: H03L7/085

    CPC分类号: H03L7/1976

    摘要: A fractional-N synthesized chirp generator includes a fractional-N synthesizer and a digital ramp synthesizer. The fractional-N synthesizer has a frequency synthesizer and a sigma-delta modulator module. The fractional-N synthesizer is configured to receive a reference frequency input signal and a frequency control value. The fractional-N synthesizer is configured to transform the reference frequency signal and the frequency control value to a chirped radio frequency (RF) output signal in a deterministic manner. The digital ramp synthesizer is configured to receive the reference frequency input signal and configured to generate the frequency control value utilizing the reference frequency input signal. The digital ramp synthesizer is further configured to provide the frequency control value to the fractional-N synthesizer. The frequency control value varies with time.

    摘要翻译: 分数N合成啁啾发生器包括分数N合成器和数字斜坡合成器。 分数N合成器具有频率合成器和Σ-Δ调制器模块。 分数N合成器被配置为接收参考频率输入信号和频率控制值。 分数N合成器被配置为以确定的方式将参考频率信号和频率控制值转换成啁啾射频(RF)输出信号。 数字斜坡合成器被配置为接收参考频率输入信号并被配置为利用参考频率输入信号产生频率控制值。 数字斜坡合成器还被配置为向小数N合成器提供频率控制值。 频率控制值随时间变化。