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    Reception interface unit in transmission system
    1.
    发明授权
    Reception interface unit in transmission system 失效
    接收接口单元在传输系统中

    公开(公告)号：US06928126B2

    公开(公告)日：2005-08-09

    申请号：US10410136

    申请日：2003-04-10

    申请人： Kinya Ono ,  Kunihiro Minoshima ,  Hidemi Usuba ,  Sho Murakoshi ,  Makoto Matsumaru ,  Seiichi Hasebe

    发明人： Kinya Ono ,  Kunihiro Minoshima ,  Hidemi Usuba ,  Sho Murakoshi ,  Makoto Matsumaru ,  Seiichi Hasebe

    IPC分类号： G11B20/10 ,  G11B20/14 ,  H04J3/06 ,  H04L7/00 ,  H04L12/28 ,  H04L12/40 ,  H04L12/44 ,  H04L12/70 ,  H04L12/951 ,  H04L7/02

    CPC分类号： H04L49/9052 ,  G11B20/14 ,  H04J3/0632 ,  H04L12/40032 ,  H04L12/40071 ,  H04L12/40117 ,  H04L49/90 ,  H04L49/9057 ,  H04L2012/40247

    摘要： A reception interface unit in a transmission system wherein time series data is divided into data groups and a data packet with reproduction specification time data specifying a time at which each data piece in the data groups should be reproduced, added to the data groups is transmitted on a transmission bus in a time division manner. The interface unit has a cycle timer for counting the reference time of the home device based on the reference time on the transmission bus, a unit for extracting the reproduction specification time data in the data groups from a signal received via the transmission bus and storing the reproduction specification time data in a buffer, a reception buffer for inputting and storing the data pieces in the data groups in order and reading out the data pieces in the storage order responsive to a reproduction clock, a match detector for generating a reference clock pulse if the reference time of the home device matches the reproduction specification time, and a PLL circuit being responsive to the reference clock pulse for generating a clock signal which is phase synchronized with the reference clock pulse as the reproduction clock. When the reference time on the transmission bus changes, the data stored in the buffer in the reproduction specification time data extraction unit and the data stored in the reception buffer are all deleted.

    摘要翻译： 传输系统中的接收接口单元，其中时间序列数据被分成数据组和具有指定应该再现数据组中的每个数据段的时间的再现指定时间数据的数据分组被发送到数据组 以时分方式传输总线。 接口单元具有循环定时器，用于根据传输总线上的参考时间对归属设备的参考时间进行计数，该单元用于从经由传输总线接收的信号中提取数据组中的再现指定时间数据，并存储 缓冲器中的再现指定时间数据，用于按顺序输入和存储数据组中的数据段的接收缓冲器，并且响应于再现时钟以存储顺序读出数据片;匹配检测器，用于产生参考时钟脉冲，如果 家用设备的参考时间与再现指定时间相匹配，并且PLL电路响应于参考时钟脉冲，用于产生与参考时钟脉冲相位同步的时钟信号作为再现时钟。 当传输总线上的参考时间改变时，存储在再现指定时间数据提取单元中的缓冲器中的数据和存储在接收缓冲器中的数据都被删除。

    Reception interface unit in transmission system
    3.
    发明授权
    Reception interface unit in transmission system 失效
    接收接口单元在传输系统中

    公开(公告)号：US06570945B1

    公开(公告)日：2003-05-27

    申请号：US09283759

    申请日：1999-04-02

    申请人： Kinya Ono ,  Kunihiro Minoshima ,  Hidemi Usuba ,  Sho Murakoshi ,  Makoto Matsumaru ,  Seiichi Hasebe

    发明人： Kinya Ono ,  Kunihiro Minoshima ,  Hidemi Usuba ,  Sho Murakoshi ,  Makoto Matsumaru ,  Seiichi Hasebe

    IPC分类号： H04L702

    CPC分类号： H04L49/9052 ,  G11B20/14 ,  H04J3/0632 ,  H04L12/40032 ,  H04L12/40071 ,  H04L12/40117 ,  H04L49/90 ,  H04L49/9057 ,  H04L2012/40247

    摘要： A reception interface unit in a transmission system wherein time series data is divided into data groups and a data packet with reproduction specification time data specifying a time at which each data piece in the data groups should be reproduced, added to the data groups is transmitted on a transmission bus in a time division manner. The interface unit has a cycle timer for counting the reference time of the home device based on the reference time on the transmission bus, a unit for extracting the reproduction specification time data in the data groups from a signal received via the transmission bus and storing the reproduction specification time data in a buffer, a reception buffer for inputting and storing the data pieces in the data groups in order and reading out the data pieces in the storage order responsive to a reproduction clock, a match detector for generating a reference clock pulse if the reference time of the home device matches the reproduction specification time, and a PLL circuit being responsive to the reference clock pulse for generating a clock signal which is phase synchronized with the reference clock pulse as the reproduction clock. When the reference time on the transmission bus changes, the data stored in the buffer in the reproduction specification time data extraction unit and the data stored in the reception buffer are all deleted.

    摘要翻译： 传输系统中的接收接口单元，其中时间序列数据被分成数据组和具有指定应该再现数据组中的每个数据段的时间的再现指定时间数据的数据分组被发送到数据组 以时分方式传输总线。 接口单元具有循环定时器，用于根据传输总线上的参考时间对家庭设备的参考时间进行计数，该单元用于从经由传输总线接收的信号中提取数据组中的再现指定时间数据，并存储 缓冲器中的再现指定时间数据，用于按顺序输入和存储数据组中的数据段的接收缓冲器，并且响应于再现时钟以存储顺序读出数据片;匹配检测器，用于产生参考时钟脉冲，如果 家用设备的参考时间与再现指定时间相匹配，并且PLL电路响应于参考时钟脉冲，用于产生与参考时钟脉冲相位同步的时钟信号作为再现时钟。 当传输总线上的参考时间改变时，存储在再现指定时间数据提取单元中的缓冲器中的数据和存储在接收缓冲器中的数据都被删除。

    Information transmitting apparatus and method, information receiving apparatus and method, and information transmitting/receiving apparatus and method
    4.
    发明授权
    Information transmitting apparatus and method, information receiving apparatus and method, and information transmitting/receiving apparatus and method 失效
    信息发送装置和方法，信息接收装置和方法以及信息发送/接收装置和方法

    公开(公告)号：US06810453B2

    公开(公告)日：2004-10-26

    申请号：US10291829

    申请日：2002-11-12

    申请人： Kinya Ono ,  Makoto Matsumaru ,  Sho Murakoshi ,  Hidemi Usuba ,  Kunihiro Minoshima ,  Seiichi Hasebe

    发明人： Kinya Ono ,  Makoto Matsumaru ,  Sho Murakoshi ,  Hidemi Usuba ,  Kunihiro Minoshima ,  Seiichi Hasebe

    IPC分类号： G06F1300

    CPC分类号： H04N21/43615 ,  H04N21/4131 ,  H04N21/43632

    摘要： An information transmitting apparatus is included in a system for transmitting information through a bus (B), for transmitting the information onto the bus. The information transmitting apparatus is provided with: an initialization detecting device (1) for detecting whether or not the bus is initialized; an obtaining device (6) for obtaining post-initialization information, which is the information transmitted on the bus immediately after an initialization of the bus when the initialization of the bus is detected by the initialization detecting device; and a transmission controlling device (3) for judging whether or not transmission information, which is the information to be transmitted onto the bus, can be transmitted in accordance with the obtained post-initialization information, and then transmitting the transmission information onto the bus if it is judged that the transmission information can be transmitted.

    摘要翻译： 信息发送装置包括在用于通过总线（B）发送信息的系统中，用于将信息发送到总线上。 信息发送装置具有：初始化检测装置（1），用于检测总线是否被初始化; 一种用于获取初始化信息的获取装置，所述初始化信息是当所述初始化检测装置检测到所述总线的初始化时，在总线初始化之后立即在总线上发送的信息; 以及发送控制装置（3），用于根据所获得的初始化后信息判断是否能够发送作为要发送到总线上的信息的发送信息，然后将发送信息发送到总线上，如果 判断可以发送发送信息。

    Transmission interface unit in transmission system
    5.
    发明授权
    Transmission interface unit in transmission system 有权
    传输系统中的传输接口单元

    公开(公告)号：US06633578B1

    公开(公告)日：2003-10-14

    申请号：US09302489

    申请日：1999-04-30

    申请人： Makoto Matsumaru ,  Kunihiro Minoshima ,  Hidemi Usuba ,  Sho Murakoshi ,  Kinya Ono ,  Seiichi Hasebe

    发明人： Makoto Matsumaru ,  Kunihiro Minoshima ,  Hidemi Usuba ,  Sho Murakoshi ,  Kinya Ono ,  Seiichi Hasebe

    IPC分类号： H04L1240

    CPC分类号： H04L12/40058 ,  H04L12/40065 ,  H04L12/40084 ,  H04L12/6418

    摘要： A transmission interface unit in a transmission system wherein time series data is divided into data groups and a data packet comprising reproduction specification time data specifying the time at which each data piece in the data groups should be reproduced, added to the data groups is transmitted on a transmission bus in a time division manner. The reception interface unit has a cycle timer for counting the reference time of the home machine based on the reference time on the transmission bus, a generation section for generating the reproduction specification time data, an addition section for dividing the time series data into data groups, putting into packets, and adding the reproduction specification time data to the data in the packets, and a rewrite section for rewriting the reproduction specification time data. When the reference time on the transmission bus changes, the rewrite section rewrites the reproduction specification time data added to the data put into a packet before the reference time on the transmission bus changes.

    摘要翻译： 传输系统中的传输接口单元，其中时间序列数据被分成数据组，并且包括指定应该再现数据组中的每个数据段的时间的再现指定时间数据的数据分组被发送到数据组 以时分方式传输总线。 接收接口单元具有循环定时器，用于根据传输总线上的参考时间对归属机的基准时间进行计数，生成部分，用于生成再现指定时间数据;加法部分，用于将时间序列数据划分为数据组 ，将分组中的数据添加到再现规格时间数据，以及重写部分，用于重写再现指定时间数据。 当传输总线上的参考时间改变时，重写部分重写在传输总线上的参考时间之前添加到放入分组中的数据的再现指定时间数据。

    Transmission managing apparatus, information processing apparatus and information transmitting system
    6.
    发明授权
    Transmission managing apparatus, information processing apparatus and information transmitting system 失效
    传输管理装置，信息处理装置和信息发送系统

    公开(公告)号：US06594239B1

    公开(公告)日：2003-07-15

    申请号：US09472665

    申请日：1999-12-27

    申请人： Makoto Matsumaru ,  Hidemi Usuba ,  Sho Murakoshi ,  Kinya Ono ,  Seiichi Hasebe ,  Kunihiro Minoshima

    发明人： Makoto Matsumaru ,  Hidemi Usuba ,  Sho Murakoshi ,  Kinya Ono ,  Seiichi Hasebe ,  Kunihiro Minoshima

    IPC分类号： H04J1408

    CPC分类号： H04N21/43632 ,  H04L12/40013 ,  H04N21/43615

    摘要： A transmission managing apparatus included in an information transmitting system comprising a serial bus, an IRM node, which has a resource register for storing a channel used for an information transmission executed in a time division manner on the serial bus and a transmission occupation period occupied for the information transmission, for indicating the channel and the transmission occupation period and a general node for insuring a non-used channel and a preservable period, which is the transmission occupation period, that can be occupied, while referring to a memory content of the transmission state memory, to thereby carry out the information transmission. The transmission managing apparatus is provided with: a comparator for monitoring whether or not the memory content is updated; and a command generator for reporting a fact of the updating through the serial bus to the general node when updated.

    摘要翻译： 包括在包括串行总线，IRM节点的信息发送系统中的传输管理装置，其具有用于存储用于在串行总线上以时分方式执行的信息传输的信道的资源寄存器和为 用于指示信道和传输占用周期的信息传输，以及用于确保可以被占用的传输占用周期的未使用信道和可保留周期的一般节点，同时参考传输的存储器内容 状态存储器，从而进行信息传输。 发送管理装置设置有：用于监视存储器内容是否被更新的比较器; 以及命令发生器，用于在更新时将通过串行总线更新的事实报告给通用节点。

    Data transmission system with bus failure recovery
    8.
    发明授权
    Data transmission system with bus failure recovery 失效
    数据传输系统，总线故障恢复

    公开(公告)号：US6122248A

    公开(公告)日：2000-09-19

    申请号：US349918

    申请日：1999-07-08

    申请人： Sho Murakoshi ,  Hiroaki Shibuki ,  Hidemi Usuba ,  Makoto Matsumaru ,  Kunihiro Minoshima ,  Kinya Ohno ,  Seiichi Hasebe

    发明人： Sho Murakoshi ,  Hiroaki Shibuki ,  Hidemi Usuba ,  Makoto Matsumaru ,  Kunihiro Minoshima ,  Kinya Ohno ,  Seiichi Hasebe

    IPC分类号： G06F13/14 ,  G01R31/08 ,  G06F13/38 ,  H04B17/40 ,  H04L12/28

    CPC分类号： G06F13/4282 ,  G06F2213/0012

    摘要： A data transmission system capable of ensuring proper operation even when any nodes-to-bus connection, which is not allowed by restrictions, is made. The system implements data transmission among a plurality of nodes mutually connected by a cable serving as a bus. The system includes a first process for initializing a control process on the nodes to the bus in accordance with a change in an electrical connection of the bus, a second process of detecting a connection topology of the nodes, and a third process for identifying each node to be connected to the bus. A forbidden connection detecting process is provided for detecting if there is a loop connection path of the nodes on the bus and handling operations are provided for executing handling in accordance with a result of detection by the forbidden connection detecting process.

    摘要翻译： 即使在不允许限制的任何节点到总线连接的情况下，也能够确保适当的操作的数据传输系统。 该系统在通过用作总线的电缆相互连接的多个节点之间实现数据传输。 该系统包括用于根据总线的电连接的变化来初始化节点到总线的控制过程的第一过程，检测节点的连接拓扑的第二过程以及用于识别每个节点的第三过程 连接到公共汽车。 提供禁止连接检测处理，用于检测是否存在总线上的节点的环路连接路径，并且根据禁止连接检测处理的检测结果提供处理操作以执行处理。

    WIRELESS COMMUNICATION SYSTEM, CONTROL STATION, AND TERMINAL STATION
    9.
    发明申请
    WIRELESS COMMUNICATION SYSTEM, CONTROL STATION, AND TERMINAL STATION 审中-公开
    无线通信系统，控制站和终端站

    公开(公告)号：US20060034200A1

    公开(公告)日：2006-02-16

    申请号：US11161244

    申请日：2005-07-27

    申请人： Makoto Matsumaru ,  Hidemi Usuba ,  Wataru Onodera

    发明人： Makoto Matsumaru ,  Hidemi Usuba ,  Wataru Onodera

    IPC分类号： H04B7/00

    CPC分类号： H04W76/14 ,  H04W84/12

    摘要： The present invention provides a wireless communication system, a control station, and a terminal station whereby a direct link (DL) protocol can be initiated from the control station. A processor has a DL request AP packet generation unit (direct communication request generation instruction unit), which issues an instruction so that a direct link (direct communication) to a terminal station is established according to a notification issued from a packet transfer volume determination circuit when a packet transfer volume stored in a packet transfer volume memory circuit exceeds a predetermined threshold value.

    摘要翻译： 本发明提供一种无线通信系统，控制站和终端站，由此可以从控制站启动直接链路（DL）协议。 处理器具有DL请求AP分组生成单元（直接通信请求生成指示单元），其发出指示，使得根据从分组传送量确定电路发出的通知向终端站建立直接链接（直接通信） 当存储在分组传送音量存储器电路中的分组传送音量超过预定阈值时。

    Phase locked state detecting apparatus and image processing apparatus
    10.
    发明授权
    Phase locked state detecting apparatus and image processing apparatus 失效
    锁相状态检测装置和图像处理装置

    公开(公告)号：US06956441B2

    公开(公告)日：2005-10-18

    申请号：US10685592

    申请日：2003-10-16

    申请人： Makoto Matsumaru ,  Kunihiro Minoshima

    发明人： Makoto Matsumaru ,  Kunihiro Minoshima

    IPC分类号： G11B20/14 ,  H03L7/095 ,  H04L7/033 ,  H03L7/00

    CPC分类号： H03L7/095 ,  Y10S331/02

    摘要： There is provided a phase locked state detecting apparatus for accurately detecting whether or not a phase locked state is canceled, the phase locked state detecting apparatus includes a comparator 17 for comparing a phase of a processing clock signal Smc generated by a phase locked loop for use in an information processing with a phase of a reference clock signal Src; an edge counter 18 for detecting a change of a frequency of the processing clock signal Smc; and a CPU 19 for judging to based on a phase comparison result whether or not the processing clock signal Smc is in the phase locked state with respect to the reference clock signal Src, and subsequently judging based on a detection result of the frequency change whether or not the phase locked state is canceled.

    摘要翻译： 提供了一种用于准确检测相位锁定状态是否被消除的锁相状态检测装置，锁相状态检测装置包括比较器17，用于比较由锁相环产生的处理时钟信号Smc的相位，以供使用 在具有参考时钟信号Src的相位的信息处理中; 边缘计数器18，用于检测处理时钟信号Smc的频率变化; 以及CPU19，用于根据相位比较结果判断处理时钟信号Smc是否相对于基准时钟信号Src处于锁相状态，然后根据频率变化的检测结果进行判断， 不是取消锁相状态。