公开(公告)号：US20220077089A1

公开(公告)日：2022-03-10

申请号：US17203990

申请日：2021-03-17

Applicant: Kioxia Corporation

Inventor： Shinya WATANABE ,  Shinya ARAI

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: According to one embodiment, a semiconductor storage device includes a first chip and a second chip. The first chip includes a first substrate, a transistor, and a first pad. The second chip includes a second pad, a memory cell array, and a second substrate. The second pad is on the first pad. The second chip is bonded to the first chip. The first chip and the second chip includes, when viewed in a first direction orthogonal to the first substrate, a first region and a second region. The first region includes the memory cell array. The second region surrounds an area around the first region and includes a wall extending from the first substrate to the second substrate. The second substrate includes a first opening passing through the second substrate in the second region.

公开(公告)号：US20240284684A1

公开(公告)日：2024-08-22

申请号：US18426703

申请日：2024-01-30

Applicant: Kioxia Corporation

Inventor： Shinya WATANABE ,  Masahiro INOHARA ,  Tatsuo MIGITA ,  Masayuki MIURA

IPC: H10B80/00 ,  H01L21/78 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H10B80/00 ,  H01L21/78 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2225/06506 ,  H01L2225/06562 ,  H01L2225/06586

Abstract: A semiconductor device according to the present embodiment includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip has a first upper surface on which a first electrode pad is formed. The second semiconductor chip has a first lower surface on which a second electrode pad directly joined to the first electrode pad is formed and a second upper surface that is opposite the first lower surface and on which a third electrode pad is formed. The area of the first lower surface is smaller than the area of the first upper surface. The barycenter of the first lower surface and the barycenter of the first upper surface are located at different positions in the in-plane direction of the first upper surface.

公开(公告)号：US20220302055A1

公开(公告)日：2022-09-22

申请号：US17461550

申请日：2021-08-30

Applicant: KIOXIA CORPORATION

Inventor： Kotaro FUJII ,  Shinya WATANABE

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: According to one or more embodiments, a semiconductor device includes a first substrate and a second substrate. The first substrate includes a first metal layer and a first insulating layer. The first insulating layer surrounds the first metal layer. The second substrate includes a second metal layer, a second insulating layer, and a first conducive body. The second metal layer is in contact with the first metal layer. The second insulating layer surrounds the second metal layer and is in contact with the first insulating layer. A part of the first conductive body is in the second metal layer and extends in a first direction toward the first metal layer.

公开(公告)号：US20220375887A1

公开(公告)日：2022-11-24

申请号：US17651312

申请日：2022-02-16

Applicant: Kioxia Corporation

Inventor： Shinya WATANABE

IPC: H01L23/00 ,  H01L25/18 ,  H01L25/065 ,  H01L25/00

Abstract: A semiconductor device according to the present embodiment includes a substrate having a first semiconductor circuit provided thereon. First pads are located on the substrate. A first insulating layer is located on an outer side of each of the first pads. Second pads are respectively bonded to the first pads. A second insulating layer is located on an outer side of each of the second pads and is bonded to the first insulating layer. The first pads each include a first conductive material, and a first insulating material located on an inner side of the first conductive material on a bonding surface of the first pads and the second pads.