公开(公告)号：US20220077286A1

公开(公告)日：2022-03-10

申请号：US17350492

申请日：2021-06-17

Applicant: Kioxia Corporation

Inventor： Tomonari SHIODA ,  Yasunori OSHIMA ,  Taichi IWASAKI ,  Shota YAMAGIWA ,  Hiroto SAITO

IPC: H01L29/08 ,  H01L29/417 ,  H01L27/12 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device in an embodiment includes a substrate and a transistor. The transistor includes a source layer, a drain layer, a gate insulation film, a gate electrode, a contact plug and a first epitaxial layer. The source layer and the drain layer are provided in surface regions of the substrate, and contain an impurity. The gate insulation film is provided on the substrate between the source layer and the drain layer. The gate electrode is provided on the gate insulation film. The contact plug is provided so as to protrude to the source layer or the drain layer downward of a surface of the substrate. The first epitaxial layer is provided between the contact plug and the source layer or drain layer, and contains both the impurity and carbon.

公开(公告)号：US20210082935A1

公开(公告)日：2021-03-18

申请号：US16809753

申请日：2020-03-05

Applicant: Kioxia Corporation

Inventor： Yasunori OSHIMA

IPC: H01L27/11556 ,  H01L27/11582 ,  G11C5/02 ,  G11C5/06 ,  H01L21/8234

Abstract: In one embodiment, a semiconductor storage device includes a substrate, a stacked film including a plurality of first insulating layers and a plurality of electrode layers that are alternately provided on the substrate, and a second insulating layer provided on the stacked film. The device further includes a plurality of pillar portions, each of which including a first insulator, a charge storage layer, a second insulator, a first semiconductor layer and a third insulator that are sequentially provided in the stacked film and the second insulating layer. Furthermore, a width of the second insulating layer sandwiched between the pillar portions is narrower than a width of the stacked film sandwiched between the pillar portions, in at least a portion of the second insulating layer.

公开(公告)号：US20210082940A1

公开(公告)日：2021-03-18

申请号：US17106667

申请日：2020-11-30

Applicant: Kioxia Corporation

Inventor： Yasuhiro UCHIMURA ,  Tatsufumi HAMADA ,  Shinichi SOTOME ,  Tomohiro KUKI ,  Yasunori OSHIMA ,  Osamu ARISUMI

IPC: H01L27/11565 ,  H01L27/11582 ,  H01L27/1157 ,  G11C11/56 ,  G11C16/08 ,  G11C16/24

Abstract: According to one embodiment, a memory device includes a substrate; a structure including a plurality of conductive layers stacked on the substrate; and a pillar arranged inside the structure and including a semiconductor layer that extends in a direction perpendicular to a surface of the substrate. The semiconductor layer includes a first portion on a side of an upper portion of the structure, and a second portion between the first portion and the substrate. The first portion has a thickness larger than a thickness of the second portion.