公开(公告)号：US11417669B2

公开(公告)日：2022-08-16

申请号：US17010776

申请日：2020-09-02

Applicant: KIOXIA CORPORATION

Inventor： Yefei Han ,  Yusuke Arayashiki

IPC: H01L27/11 ,  H01L27/11521 ,  H01L23/00 ,  H01L27/11519

Abstract: A semiconductor memory device includes a semiconductor pillar including a semiconductor layer and extending along a first direction, a first wiring extending along a second direction crossing the first direction, a first electrode between the semiconductor pillar and the first wiring, a first insulating layer between the first electrode and the first wiring and adjacent to the first electrode, a second insulating layer between the first insulating layer and the first wiring and adjacent to the first insulating layer, the second insulating layer having a higher dielectric constant than the first insulating layer, and a third insulating layer between the second insulating layer and the first wiring. A shortest distance between the second insulating layer and the semiconductor layer in the second direction is greater than a shortest distance between the first electrode and the semiconductor layer in the second direction.

公开(公告)号：US11765899B2

公开(公告)日：2023-09-19

申请号：US17191217

申请日：2021-03-03

Applicant: Kioxia Corporation

Inventor： Ryota Narasaki ,  Weili Cai ,  Satoshi Nagashima ,  Takayuki Ishikawa ,  Yusuke Shimada ,  Yefei Han

IPC: H10B43/27 ,  H01L23/522 ,  H10B41/27

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B41/27

Abstract: A semiconductor storage device includes a first conductive layer; a first insulating layer between the first and second conductive layers; a second insulating layer between the first conductive layer and the first insulating layer; a third insulating layer between the second conductive layer and the first insulating layer; a fourth insulating layer between the second conductive layer and the third conductive layer; a fifth insulating layer between the second conductive layer and the fourth insulating layer; and a sixth insulating layer between the third conductive layer and the fourth insulating layer. The first conductive layer has a first surface. The second conductive layer has a second surface. A barrier conductive film containing at least one of nitrogen (N) or titanium (Ti) is provided on the first surface and the second surface.

公开(公告)号：US11792985B2

公开(公告)日：2023-10-17

申请号：US17190939

申请日：2021-03-03

Applicant: Kioxia Corporation

Inventor： Tatsuya Kato ,  Satoshi Nagashima ,  Yefei Han ,  Takayuki Ishikawa

IPC: H01L27/115 ,  H01L27/11582 ,  H10B43/27 ,  H01L29/423 ,  H01L23/522 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H01L29/4234 ,  H10B43/35

Abstract: A semiconductor storage device includes: a first conductive layer extending in a first direction; a second conductive layer that is disposed apart from the first conductive layer in a second direction intersecting the first direction, and extends in the first direction; a plurality of semiconductor layers provided between the first conductive layer and the second conductive layer and arranged in the first direction, each of which includes a first portion facing the first conductive layer, and a second portion facing the second conductive layer; a plurality of first memory cells provided between the first conductive layer and the semiconductor layers, respectively; and a plurality of second memory cells provided between the second conductive layer and the semiconductor layers, respectively. A gap is provided between the two semiconductor layers adjacent in the first direction.

公开(公告)号：US11594543B2

公开(公告)日：2023-02-28

申请号：US17018682

申请日：2020-09-11

Applicant: Kioxia Corporation

Inventor： Yefei Han ,  Weili Cai ,  Naoya Yoshimura

IPC: H01L27/11556 ,  G11C5/06 ,  G11C5/02 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11582

Abstract: According to one embodiment, a semiconductor storage device includes a semiconductor pillar including a channel. The channel includes a first channel portion and a second channel portion. A virtual cross section intersecting a first direction and including a first interconnection, a first electrode, the semiconductor pillar, a second electrode, and a second interconnection is determined. Both first end portions of the first channel portion and a first midpoint between both the first end portions are determined in the virtual cross section. Both second end portions of the second channel portion and a second midpoint between both the second end portions are determined in the virtual cross section. In this case, an angle between a second direction and a center line connecting the first midpoint and the second midpoint is an acute angle.