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公开(公告)号：US06239510B1
公开(公告)日：2001-05-29
申请号：US09359203
申请日：1999-07-22
IPC分类号： H02J100
CPC分类号： H02J1/14 , Y10T307/461
摘要： An apparatus and method for reducing variations in a supply voltage signal. The voltage signal which powers a circuit is regulated by adding or removing a series of redundant loads to the circuit. The redundant loads are normally not connected to the circuit. However, when one of the loads of the circuit is switched out of the circuit, one or more of the redundant loads are switched into the circuit, and then removed gradually from the circuit. When one of the loads of the circuit is to be switched into the circuit, one or more of the redundant loads are switched into the circuit first, then switched out of the circuit when the load is switched in. Thus, the voltage supply sees almost the same load during a turn-on and turn-off transition period, and variations in the voltage signal are reduced.
摘要翻译： 一种用于减小电源电压信号变化的装置和方法。 对电路供电的电压信号通过向电路中添加或删除一系列冗余负载来调节。 冗余负载通常不连接到电路。 然而，当电路的一个负载从电路切换出来时，一个或多个冗余负载被切换到电路中，然后逐渐从电路中移除。 当电路中的一个负载切换到电路中时，首先将一个或多个冗余负载切换到电路中，然后在负载切换时切换到电路中。因此，电源几乎可以看到 在导通和关断过渡期间的相同负载以及电压信号的变化减小。
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公开(公告)号：US20110002062A1
公开(公告)日：2011-01-06
申请号：US12829129
申请日：2010-07-01
IPC分类号： G11B5/02
CPC分类号： G11C27/02 , G11B2005/0018 , G11C27/026
摘要： A sample and hold circuit is disclosed that provides longer hold times. An analog multiplexer circuit is also disclosed that exhibits low switch leakage. The analog multiplexer circuit comprises a shared node, a plurality of input circuits, a control input for selecting one or more of the plurality of input circuits, and an amplifier coupled to the shared node. Each input circuit comprises an input node, a primary input switch for selectively coupling an input to the input node, and a secondary input switch for selectively coupling the input node to the shared node, wherein the secondary input switch comprises one or more transistor switches. The parasitic drain and source diodes of one or more transistor switches in secondary input switch in a selected input circuit are coupled to a voltage that is distinct from an input signal of the selected input circuit. For input circuits not selected, the parasitic drain and source diodes of secondary input switch transistor switches are coupled to an output of the amplifier.
摘要翻译： 公开了一种提供较长保持时间的采样和保持电路。 还公开了一种显示低开关泄漏的模拟多路复用器电路。 模拟多路复用器电路包括共享节点，多个输入电路，用于选择多个输入电路中的一个或多个的控制输入以及耦合到共享节点的放大器。 每个输入电路包括输入节点，用于选择性地将输入耦合到输入节点的主输入开关和用于选择性地将输入节点耦合到共享节点的次级输入开关，其中辅助输入开关包括一个或多个晶体管开关。 所选输入电路中的次级输入开关中的一个或多个晶体管开关的寄生漏极和源极二极管被耦合到与选择的输入电路的输入信号不同的电压。 对于未选择的输入电路，次级输入开关晶体管开关的寄生漏极和源极二极管耦合到放大器的输出端。
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公开(公告)号：US07554757B2
公开(公告)日：2009-06-30
申请号：US10719655
申请日：2003-11-21
IPC分类号： G11B5/02
CPC分类号： G11B5/488 , G11B5/00 , G11B5/09 , G11B5/11 , G11B5/1278 , G11B5/17 , G11B5/245 , G11B5/40 , G11B5/4915 , G11B2005/0002 , G11B2005/0005 , G11B2005/001 , G11B2005/0013 , G11B2005/0029
摘要： A write head for a magnetic storage system energizes a write coil for a plurality of bit intervals and selectively shutters the magnetic field to alter a magnetic domain of a magnetic storage medium for each bit interval. The position of the shutter may be controlled using a micro-electro mechanical system. Magnetic pole segments provide a loop between the write coil and the magnetic storage medium. Magnetic shielding on the shutter mechanisms controls the reflection of the magnetic fields. In a rewritable magnetic storage system, a first write coil generates a positive magnetic field and a second write coil generates a negative magnetic field. A shutter is associated with each write coil to selectively allow the positive or negative magnetic fields to alter the magnetic domain of the magnetic storage medium. The positive or negative magnetic fields can alter the magnetic domain in a collocated region of the magnetic storage medium to avoid jitter.
摘要翻译： 用于磁存储系统的写头为多个位间隔激励写入线圈，并且选择性地切换磁场以改变每个位间隔的磁存储介质的磁畴。 快门的位置可以使用微机电系统来控制。 磁极段在写入线圈和磁性存储介质之间提供环路。 快门机构上的磁屏蔽控制磁场的反射。 在可重写磁存储系统中，第一写入线圈产生正磁场，第二写入线圈产生负磁场。 快门与每个写入线圈相关联，以选择性地允许正或负磁场改变磁存储介质的磁畴。 正或负磁场可以改变磁存储介质的配置区域中的磁畴，以避免抖动。
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公开(公告)号：US06801556B2
公开(公告)日：2004-10-05
申请号：US10039321
申请日：2001-11-09
申请人： Jonathan H. Fischer
发明人： Jonathan H. Fischer
IPC分类号： H01S300
CPC分类号： H01S5/042 , H01S5/0427 , H01S5/06825
摘要： A driver circuit for a laser diode or other optical source includes an input stage, an output stage, a current generator circuit and an output load detection circuit. The current generator circuit is adapted to establish a modulation current for application to one of a first output and a second output of the output stage in accordance with a differential or single-ended input data signal applied to the input stage. The output load detection circuit has first and second inputs coupled to the respective first and second outputs of the output stage, and is configured to detect an improper load condition at one or more of the first and second outputs of the output stage and to generate a corresponding output indicator. The output indicator is utilized in the driver circuit to control the modulation current so as to prevent saturation of the output stage in the presence of the improper load condition. For example, the output load detection circuit may be configured to determine if a voltage level of at least one of the first and second outputs of the output stage drops below a designated load detection sense threshold, in which case the modulation current can be disabled or otherwise interrupted so as to prevent the saturation of the output stage.
摘要翻译： 用于激光二极管或其他光源的驱动电路包括输入级，输出级，电流发生器电路和输出负载检测电路。 电流发生器电路适于根据施加到输入级的差分或单端输入数据信号建立调制电流，以应用于输出级的第一输出和第二输出中的一个。 输出负载检测电路具有耦合到输出级的相应的第一和第二输出的第一和第二输入，并且被配置为检测输出级的第一和第二输出中的一个或多个处的不正确的负载状态，并且产生 相应的输出指示。 输出指示器用于驱动电路中以控制调制电流，以防止存在不正确的负载条件时输出级的饱和。 例如，输出负载检测电路可以被配置为确定输出级的第一和第二输出中的至少一个的电压电平是否下降到指定的负载检测感测阈值以下，在这种情况下，调制电流可被禁用或 否则中断，以防止输出级的饱和。
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公开(公告)号：US06674857B1
公开(公告)日：2004-01-06
申请号：US09414568
申请日：1999-10-08
申请人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith , Michael S. Toth , Keith E. Hollenbach , Weilin Zhu
发明人： Jonathan H. Fischer , Donald R. Laturell , Lane A. Smith , Michael S. Toth , Keith E. Hollenbach , Weilin Zhu
IPC分类号： H04M100
CPC分类号： H04M19/005 , Y02D70/1222
摘要： A line powered data access arrangement (DAA) is disclosed which adaptively allows proper operation with power supplied from a telephone line as conditions warrant, while at the same time satisfying the relevant requirements of many countries. In the line powered codec, a startup procedure for the international line powered codec uses register settings, e.g., country-specific register settings, which are powered and maintained from the low voltage side (e.g., from the PC or modem side) of the line powered codec. In this way, even during low line power conditions the programmed state of the line powered codec can be maintained, thus a default condition will not necessarily returned to by the line powered codec upon reset due to a power loss in the telephone line. In another aspect, a charge storage device such as a charge capacitor is charged from a charge pump formed from a differential clock signal from the low voltage side. A current and voltage detection module in the line powered codec is always powered from the telephone line. Upon detection of an off-hook signal or a power down condition, the current detection module determines if/when the current and voltage on the telephone line is sufficient to power certain circuits on the line powered codec. If sufficient power is not present, the line powered codec does not power up. However, the line powered codec will power up if sufficient current is detected. In another aspect, a plurality of power rails may be provided. A first power rail may be associated with the line power, a second power rail may be associated with a low voltage side power source, e.g., a charge storage device. A third (and other) power rails may be switchably connected to either the first power rail or second power rail as line power conditions and on-hook/off-hook conditions warrant.
摘要翻译： 公开了一种线路数据访问安排（DAA），其适应性地允许根据条件允许从电话线路提供的电力进行适当的操作，同时满足许多国家的相关要求。 在线路供电的编解码器中，用于国际线路供电的编解码器的启动过程使用寄存器设置，例如，国家特定寄存器设置，其由线路的低电压侧（例如，从PC或调制解调器侧）供电和维护 电源编解码器。 以这种方式，即使在低功率电力条件下，也可以维护线路供电的编解码器的编程状态，因此由于电话线路中的功率损耗，默认条件不一定由线路供电的编解码器复位。 另一方面，诸如充电电容器的电荷存储装置从由低电压侧的差分时钟信号形成的电荷泵充电。 线路供电编解码器中的电流和电压检测模块始终通过电话线供电。 当检测到摘机信号或断电状态时，电流检测模块确定电话线路上的电流和电压是否足以对线路供电的编解码器上的某些电路供电。 如果没有足够的电源，线路供电的编解码器不会上电。 然而，如果检测到足够的电流，则线路供电的编解码器将上电。 另一方面，可以设置多个电源轨。 第一电力轨可以与线路电力相关联，第二电力轨道可以与低电压侧电源（例如电荷存储装置）相关联。 第三（和其他）电源轨可以切换地连接到第一个电源轨或第二个电源轨，因为线路电源条件和挂机/摘机条件值得。
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6.发明授权公开(公告)号：US06535534B1
公开(公告)日：2003-03-18
申请号：US09949592
申请日：2001-09-10
申请人： Jonathan H. Fischer
发明人： Jonathan H. Fischer
IPC分类号： H01S300
CPC分类号： H01S5/042 , H01S5/0427
摘要： A driver circuit for a laser diode or other optical source includes a differential circuit having first and second inputs for receiving differential input data, a current generator circuit for generating modulation current for the optical source in response to the input data, and a variable bias circuit for applying a variable bias to the differential circuit. The current generator is preferably adapted to establish the modulation current for application to one of a first output and a second output of the driver circuit in accordance with the differential data applied to the first and second inputs of the differential circuit. The variable bias circuit may be configured such that the variable bias current generated thereby for application to the differential circuit is a function of the modulation current, thereby controlling an output overshoot of the driver circuit.
摘要翻译： 用于激光二极管或其他光源的驱动电路包括具有用于接收差分输入数据的第一和第二输入的差分电路，用于响应于输入数据产生光源的调制电流的电流发生器电路，以及可变偏置电路 用于向差分电路施加可变偏置。 电流发生器优选地适于根据施加到差分电路的第一和第二输入的差分数据建立调制电流，以应用于驱动器电路的第一输出和第二输出之一。 可变偏置电路可以被配置为使得由此产生的用于施加到差分电路的可变偏置电流是调制电流的函数，从而控制驱动器电路的输出过冲。
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7.发明授权Circuit and method for reducing a propagation delay associated with a comparator and a comparator employing the same 有权用于减小与比较器相关联的传播延迟的电路和方法，以及使用其的比较器公开(公告)号：US06252437B1
公开(公告)日：2001-06-26
申请号：US09413960
申请日：1999-10-07
申请人： Jonathan H. Fischer , Weilin Zhu
发明人： Jonathan H. Fischer , Weilin Zhu
IPC分类号： H03K513
CPC分类号： H03K5/2481
摘要： A circuit and method for reducing a propagation delay associated with a comparator and a comparator employing the circuit or method. In one embodiment, the comparator, includes: (1) an input stage that receives a differential input signal and develops therefrom a threshold signal, (2) an output stage, coupled to the input stage, that develops a level shifted single-ended output signal as a function of the threshold signal, and (3) a speed-up circuit, associated with the input stage, that reduces a time period to develop the determinant signal thereby decreasing a propagation delay in developing the level shifted single-ended output signal from the differential input signal.
摘要翻译： 一种用于减小与比较器相关联的传播延迟的电路和方法，以及采用该电路或方法的比较器。 在一个实施例中，比较器包括：（1）输入级，其接收差分输入信号并从其产生阈值信号;（2）耦合到输入级的输出级，产生电平移位的单端输出 信号作为阈值信号的函数，以及（3）与输入级相关联的加速电路，其减少了形成行列式信号的时间周期，从而降低了开发电平移位的单端输出信号中的传播延迟 从差分输入信号。
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8.发明授权公开(公告)号：US08437467B2
公开(公告)日：2013-05-07
申请号：US13187683
申请日：2011-07-21
CPC分类号： H04M3/2272 , H04M3/14
摘要： In one embodiment, a low cost, simple circuit for detecting an off-hook condition of a telecommunication line comprising tip and ring signal lines is provided. The circuit comprises a voltage divider for coupling between the tip and ring lines without an intervening transistor and having a node at which is presented a scaled version of a voltage across the voltage divider. The circuit further comprises a transistor having a control terminal coupled to the node, a first current flow terminal coupled to a voltage source, and a second current flow terminal coupled to an output terminal, wherein the output terminal bears a value that is indicative of a voltage across the tip and ring lines and thus whether the telecommunication line is off-hook.
摘要翻译： 在一个实施例中，提供了用于检测包括尖端和环形信号线的电信线路的摘机状态的低成本，简单的电路。 该电路包括用于在尖端和环形线之间耦合的分压器，而没有中间晶体管，并且具有节点，在该节点处呈现分压器两端的电压的缩放形式。 电路还包括晶体管，其具有耦合到节点的控制端子，耦合到电压源的第一电流端子和耦合到输出端子的第二电流端子，其中输出端子承载指示 尖端和环线两端的电压，从而电信线路是否摘机。
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9.发明申请公开(公告)号：US20110274266A1
公开(公告)日：2011-11-10
申请号：US13187683
申请日：2011-07-21
IPC分类号： H04M3/00
CPC分类号： H04M3/2272 , H04M3/14
摘要： In one embodiment, a low cost, simple circuit for detecting an off-hook condition of a telecommunication line comprising tip and ring signal lines is provided. The circuit comprises a voltage divider for coupling between the tip and ring lines without an intervening transistor and having a node at which is presented a scaled version of a voltage across the voltage divider. The circuit further comprises a transistor having a control terminal coupled to the node, a first current flow terminal coupled to a voltage source, and a second current flow terminal coupled to an output terminal, wherein the output terminal bears a value that is indicative of a voltage across the tip and ring lines and thus whether the telecommunication line is off-hook.
摘要翻译： 在一个实施例中，提供了用于检测包括尖端和环形信号线的电信线路的摘机状态的低成本，简单的电路。 该电路包括用于在尖端和环形线之间耦合的分压器，而没有中间晶体管，并且具有节点，在该节点处呈现分压器两端的电压的缩放形式。 电路还包括晶体管，其具有耦合到节点的控制端子，耦合到电压源的第一电流端子和耦合到输出端子的第二电流端子，其中输出端子承载指示 尖端和环线两端的电压，从而电信线路是否摘机。
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公开(公告)号：US07773332B2
公开(公告)日：2010-08-10
申请号：US10719645
申请日：2003-11-21
CPC分类号： G11C27/02
摘要： A sample and hold circuit is disclosed that provides longer hold times. The sample and hold circuit can be used in a disc drive to provide improved read-to-write and write-to-read mode transitions. The sample and hold circuit has an input and an output, and includes at least one capacitive element for retaining a charge. The capacitive element is connected to a node between the input and the output. The sample and hold circuit includes at least one input switch to selectively connect the capacitive element to the input and at least one output switch to selectively connect the capacitive element to the output. In addition, an amplifier is connected to the node and has an offset voltage. In this manner, a voltage drop across at least one of the input and output switches is limited to the offset voltage.
摘要翻译： 公开了一种提供较长保持时间的采样和保持电路。 采样和保持电路可用于磁盘驱动器，以提供改进的读写和写 - 读模式转换。 采样和保持电路具有输入和输出，并且包括用于保持电荷的至少一个电容元件。 电容元件连接到输入和输出之间的节点。 采样和保持电路包括至少一个输入开关，用于选择性地将电容元件连接到输入端和至少一个输出开关，以选择性地将电容元件连接到输出端。 此外，放大器连接到节点并具有偏移电压。 以这种方式，输入和输出开关中的至少一个上的电压降被限制到偏移电压。
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