公开(公告)号：US20100038709A1

公开(公告)日：2010-02-18

申请号：US12236517

申请日：2008-09-24

申请人： Kuo-Chen Wang ,  Jung-Hua Chen

发明人： Kuo-Chen Wang ,  Jung-Hua Chen

IPC分类号： H01L27/088 ,  H01L29/78

CPC分类号： H01L27/088 ,  H01L21/823487 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/66666 ,  H01L29/7827

摘要： A vertical transistor includes a substrate, a semiconductor structure, a gate, a gate dielectric layer, and a conductive layer. The semiconductor structure is disposed on the substrate and includes two vertical plates and a bottom plate. The bottom plate has an upper surface connected to bottoms of the two vertical plates and a bottom surface connected to the substrate. The gate surrounds the semiconductor structure to fill between the two vertical plates, and the gate is disposed around the two vertical plates. The gate dielectric layer is sandwiched in between the gate and the semiconductor structure, and the conductive layer is disposed on the semiconductor structure and electrically connected with tops of the two vertical plates.

摘要翻译： 垂直晶体管包括衬底，半导体结构，栅极，栅极介电层和导电层。 半导体结构设置在基板上并且包括两个垂直板和底板。 底板具有连接到两个垂直板的底部的上表面和连接到基板的底表面。 栅极围绕半导体结构以填充在两个垂直板之间，并且栅极围绕两个垂直板设置。 栅介质层夹在栅极和半导体结构之间，导电层设置在半导体结构上并与两个垂直板的顶部电连接。

公开(公告)号：US07968937B2

公开(公告)日：2011-06-28

申请号：US12236517

申请日：2008-09-24

申请人： Kuo-Chen Wang ,  Jung-Hua Chen

发明人： Kuo-Chen Wang ,  Jung-Hua Chen

IPC分类号： H01L29/66 ,  H01L27/108

CPC分类号： H01L27/088 ,  H01L21/823487 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/66666 ,  H01L29/7827

摘要： A vertical transistor includes a substrate, a semiconductor structure, a gate, a gate dielectric layer, and a conductive layer. The semiconductor structure is disposed on the substrate and includes two vertical plates and a bottom plate. The bottom plate has an upper surface connected to bottoms of the two vertical plates and a bottom surface connected to the substrate. The gate surrounds the semiconductor structure to fill between the two vertical plates, and the gate is disposed around the two vertical plates. The gate dielectric layer is sandwiched in between the gate and the semiconductor structure, and the conductive layer is disposed on the semiconductor structure and electrically connected with tops of the two vertical plates.

摘要翻译： 垂直晶体管包括衬底，半导体结构，栅极，栅极介电层和导电层。 半导体结构设置在基板上并且包括两个垂直板和底板。 底板具有连接到两个垂直板的底部的上表面和连接到基板的底表面。 栅极围绕半导体结构以填充在两个垂直板之间，并且栅极围绕两个垂直板设置。 栅介质层夹在栅极和半导体结构之间，导电层设置在半导体结构上并与两个垂直板的顶部电连接。

公开(公告)号：US20110159652A1

公开(公告)日：2011-06-30

申请号：US13042471

申请日：2011-03-08

申请人： Jung-Hua Chen

发明人： Jung-Hua Chen

IPC分类号： H01L21/336

CPC分类号： H01L29/7827 ,  H01L27/10876 ,  H01L29/42356 ,  H01L29/456 ,  H01L29/495

摘要： A substrate is provided. A pillar protruding out of a surface of the substrate is already formed on the substrate, and a patterned layer is already formed on the pillar. The pillar includes a lower part, a channel region, and an upper part from bottom to top, and the lower part has a first doped region. A gate dielectric layer is formed on a sidewall at one side of the pillar. A surrounding gate is formed on the gate dielectric layer located on the channel region, and a base line electrically connected to the channel region is formed on a sidewall at the other side of the pillar. A second doped region is formed in the upper part of the pillar.

摘要翻译： 提供基板。 已经在衬底上形成从衬底的表面突出的柱，并且在柱上已经形成图案化层。 该柱包括下部，沟道区和从下到上的上部，并且下部具有第一掺杂区。 栅极介电层形成在柱的一侧的侧壁上。 在位于通道区域上的栅介质层上形成周围栅极，并且在柱的另一侧的侧壁上形成与沟道区电连接的基极线。 第二掺杂区形成在柱的上部。

公开(公告)号：US06425148B1

公开(公告)日：2002-07-30

申请号：US09931967

申请日：2001-08-17

申请人： Jung-Hua Chen

发明人： Jung-Hua Chen

IPC分类号： A47K400

CPC分类号： E03D1/003

摘要： A water-saving device for a toilet comprises a tank, a tank lid mounted on top of the tank, a sink formed on the sink and communicated with a chamber in the tank via a hole in the sink, and an output tube having a lower end communicated with an inlet tube and an upper end for supplying water into the sink. A guide tube is mounted in the tank and comprises an upper end communicated with the hole of the sink and a lower end immersed in the water in the chamber of the tank such that drainage of water in the sink via the hole of the sink and the guide tube into the chamber of the tank is almost silent.

摘要翻译： 一种用于马桶的节水装置包括：罐，安装在罐顶部的罐盖，形成在水槽上的槽，通过槽中的孔与罐中的室连通，以及具有下部的输出管 端部与入口管和上端连通，用于将水供应到水槽中。 引导管安装在罐中，包括与槽的孔连通的上端，以及浸没在罐的室中的水中的下端，使得通过槽的孔和水槽中的水排出， 导管进入储罐的腔室几乎沉默。

公开(公告)号：US06791041B1

公开(公告)日：2004-09-14

申请号：US10397189

申请日：2003-03-27

申请人： Kuo-Sheng Chen ,  Jung-Hua Chen ,  Tung-Pai Chen

发明人： Kuo-Sheng Chen ,  Jung-Hua Chen ,  Tung-Pai Chen

IPC分类号： H01H1370

CPC分类号： H01H9/0271 ,  H01H2300/03 ,  Y02B90/224 ,  Y04S20/14

摘要： An IA switch including a base seat, circuit board and panel. The base seat is connected to a connector, holes are disposed at the backside of the connector. The circuit board is integrated with a plug, chip, relay and lamp-attached button switch. The circuit board is combined with said panel at a backside. The plug is combined with said panel at a backside. The plug is combined with the connector at a front side. The panel has holes corresponding to the lamp-attached button switches. Front ends of the button switches are projected out of the holes. The panel is combined with the outside of the base seat. A picture and plastic film are stuck on the outside of the panel one after another.

摘要翻译： IA开关，包括基座，电路板和面板。 基座连接到连接器，孔位于连接器的背面。 电路板集成了插头，芯片，继电器和灯附件按钮开关。 电路板在背面与所述面板组合。 插头在背面与所述面板组合。 插头与正面的连接器组合。 面板具有与灯附件按钮开关对应的孔。 按钮开关的前端从孔中伸出。 面板与基座的外侧相结合。 一张照片和塑料胶片一个接一个地卡在面板的外面。

公开(公告)号：US08003457B2

公开(公告)日：2011-08-23

申请号：US13042471

申请日：2011-03-08

申请人： Jung-Hua Chen

发明人： Jung-Hua Chen

IPC分类号： H01L21/8238

CPC分类号： H01L29/7827 ,  H01L27/10876 ,  H01L29/42356 ,  H01L29/456 ,  H01L29/495

摘要： A substrate is provided. A pillar protruding out of a surface of the substrate is already formed on the substrate, and a patterned layer is already formed on the pillar. The pillar includes a lower part, a channel region, and an upper part from bottom to top, and the lower part has a first doped region. A gate dielectric layer is formed on a sidewall at one side of the pillar. A surrounding gate is formed on the gate dielectric layer located on the channel region, and a base line electrically connected to the channel region is formed on a sidewall at the other side of the pillar. A second doped region is formed in the upper part of the pillar.

摘要翻译： 提供基板。 已经在衬底上形成从衬底的表面突出的柱，并且在柱上已经形成图案化层。 该柱包括下部，沟道区和从下到上的上部，并且下部具有第一掺杂区。 栅极介电层形成在柱的一侧的侧壁上。 在位于通道区域上的栅介质层上形成周围的栅极，在柱的另一侧的侧壁上形成与沟道区电连接的基线。 第二掺杂区形成在柱的上部。

公开(公告)号：US07928490B2

公开(公告)日：2011-04-19

申请号：US12368278

申请日：2009-02-09

申请人： Jung-Hua Chen

发明人： Jung-Hua Chen

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L29/7827 ,  H01L27/10876 ,  H01L29/42356 ,  H01L29/456 ,  H01L29/495

摘要： A vertical transistor including a substrate, a gate, a base line and a gate dielectric layer is provided. The substrate includes a pillar protruding out of a surface of the substrate. The pillar includes a first doped region, a channel region and a second doped region from bottom to top. The gate is disposed on a sidewall at one side of the channel region. The base line is disposed on a sidewall at the other side of the channel region and not contacted with the gate. The gate dielectric layer is disposed between the gate and the channel region.

摘要翻译： 提供了包括基板，栅极，基极线和栅极介电层的垂直晶体管。 基板包括从基板的表面突出的支柱。 该柱包括从底部到顶部的第一掺杂区域，沟道区域和第二掺杂区域。 栅极设置在沟道区一侧的侧壁上。 基线设置在通道区域的另一侧的侧壁上，并且不与栅极接触。 栅介质层设置在栅极和沟道区之间。

公开(公告)号：US20100102361A1

公开(公告)日：2010-04-29

申请号：US12368278

申请日：2009-02-09

申请人： Jung-Hua Chen

发明人： Jung-Hua Chen

IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7827 ,  H01L27/10876 ,  H01L29/42356 ,  H01L29/456 ,  H01L29/495

摘要： A vertical transistor including a substrate, a gate, a base line and a gate dielectric layer is provided. The substrate includes a pillar protruding out of a surface of the substrate. The pillar includes a first doped region, a channel region and a second doped region from bottom to top. The gate is disposed on a sidewall at one side of the channel region. The base line is disposed on a sidewall at the other side of the channel region and not contacted with the gate. The gate dielectric layer is disposed between the gate and the channel region.

摘要翻译： 提供了包括基板，栅极，基极线和栅极介电层的垂直晶体管。 基板包括从基板的表面突出的支柱。 该柱包括从底部到顶部的第一掺杂区域，沟道区域和第二掺杂区域。 栅极设置在沟道区一侧的侧壁上。 基线设置在通道区域的另一侧的侧壁上，并且不与栅极接触。 栅介质层设置在栅极和沟道区之间。