公开(公告)号：US08772780B2

公开(公告)日：2014-07-08

申请号：US13609272

申请日：2012-09-11

Applicant: Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Kuo-Yu Huang ,  Te-Chun Huang

IPC: H01L29/04

CPC classification number: H01L27/1244 ,  G02F2001/13456 ,  H01L27/1259

Abstract: An array substrate structure of a display panel includes a substrate, a plurality of first wirings, a first patterned insulating layer, a plurality of second wirings, a plurality of first protective patterns, and a plurality of second protective patterns. The substrate has a wiring region. The first wirings are disposed in the wiring region. The first patterned insulating layer is disposed on the first wirings. The second wirings are disposed on the first patterned insulating layer. The first protective patterns are disposed in the wiring region and disposed on the corresponding second wiring, respectively, where the first protective pattern includes a semiconductor material. The second protective patterns are disposed on the corresponding first protective pattern, respectively, where the second protective pattern includes an inorganic insulating material.

Abstract translation: 显示面板的阵列基板结构包括基板，多个第一布线，第一图案化绝缘层，多个第二布线，多个第一保护图案和多个第二保护图案。 基板具有布线区域。 第一布线布置在布线区域中。 第一图案化绝缘层设置在第一布线上。 第二布线布置在第一图案化绝缘层上。 第一保护图案分别布置在布线区域中并且分别布置在第一保护图案包括半导体材料的相应的第二布线上。 第二保护图案分别设置在相应的第一保护图案上，其中第二保护图案包括无机绝缘材料。

公开(公告)号：US20130168707A1

公开(公告)日：2013-07-04

申请号：US13609272

申请日：2012-09-11

Applicant: Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Kuo-Yu Huang ,  Te-Chun Huang

IPC: H01L33/08 ,  H01L21/336

CPC classification number: H01L27/1244 ,  G02F2001/13456 ,  H01L27/1259

Abstract: An array substrate structure of a display panel includes a substrate, a plurality of first wirings, a first patterned insulating layer, a plurality of second wirings, a plurality of first protective patterns, and a plurality of second protective patterns. The substrate has a wiring region. The first wirings are disposed in the wiring region. The first patterned insulating layer is disposed on the first wirings. The second wirings are disposed on the first patterned insulating layer. The first protective patterns are disposed in the wiring region and disposed on the corresponding second wiring, respectively, where the first protective pattern includes a semiconductor material. The second protective patterns are disposed on the corresponding first protective pattern, respectively, where the second protective pattern includes an inorganic insulating material.

Abstract translation: 显示面板的阵列基板结构包括基板，多个第一布线，第一图案化绝缘层，多个第二布线，多个第一保护图案和多个第二保护图案。 基板具有布线区域。 第一布线布置在布线区域中。 第一图案化绝缘层设置在第一布线上。 第二布线布置在第一图案化绝缘层上。 第一保护图案分别布置在布线区域中并且分别布置在第一保护图案包括半导体材料的相应的第二布线上。 第二保护图案分别设置在相应的第一保护图案上，其中第二保护图案包括无机绝缘材料。

公开(公告)号：US20130161604A1

公开(公告)日：2013-06-27

申请号：US13541757

申请日：2012-07-04

Applicant: Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: H01L29/786 ,  H01L21/36

CPC classification number: H01L27/127 ,  G02F1/133345 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2001/13606 ,  G02F2001/136218 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A pixel structure and a manufacturing method thereof are provided. The pixel structure includes a substrate, a scan line, a data line, a first insulating layer, an active device, a second insulating layer, a common electrode and a first pixel electrode. The data line crossed to the scan line is disposed on the substrate and includes a linear transmitting part and a cross-line transmitting part. The first insulating layer covering the scan line and the linear transmitting part is disposed between the scan line and the cross-line transmitting part. The active device, including a gate, an oxide channel, a source and a drain, is connected to the scan line and the data line. The second insulating layer is disposed on the oxide channel and the linear transmitting part. The common electrode is disposed above the linear transmitting part. The first pixel electrode is connected to the drain.

Abstract translation: 提供像素结构及其制造方法。 像素结构包括基板，扫描线，数据线，第一绝缘层，有源器件，第二绝缘层，公共电极和第一像素电极。 与扫描线交叉的数据线设置在基板上，并且包括线性透射部分和交叉线传输部分。 覆盖扫描线的第一绝缘层和线性透射部分设置在扫描线和交叉线传输部分之间。 包括栅极，氧化物通道，源极和漏极的有源器件连接到扫描线和数据线。 第二绝缘层设置在氧化物通道和线性透射部分上。 公共电极设置在线状发送部的上方。 第一像素电极连接到漏极。

公开(公告)号：US08772796B2

公开(公告)日：2014-07-08

申请号：US13483005

申请日：2012-05-29

Applicant: Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Kuo-Yu Huang ,  Te-Chun Huang

IPC: H01L29/18 ,  H01L27/12 ,  H01L27/15

CPC classification number: H01L27/1248 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/156

Abstract: A panel is disclosed, in which, a patterned semiconductor layer is formed on an insulation layer. The patterned semiconductor layer includes a portion corresponding to an electrode and another portion corresponding to a wiring trace. The portion corresponding to the electrode may be formed as, for example, a channel, and the other portion corresponding to the wiring trace may protect the wiring trace during fabrication process or in the structure from scratching or corrosion.

Abstract translation: 公开了一种面板，其中在绝缘层上形成图案化的半导体层。 图案化半导体层包括对应于电极的部分和对应于布线迹线的另一部分。 对应于电极的部分可以形成为例如通道，并且对应于布线迹线的另一部分可以在制造过程期间或在结构中保护布线迹线免受刮擦或腐蚀。

公开(公告)号：US20120092578A1

公开(公告)日：2012-04-19

申请号：US13337160

申请日：2011-12-26

Applicant: Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

IPC: G02F1/133 ,  G02F1/136

CPC classification number: G02F1/13394 ,  G02F1/13454 ,  G02F2001/133388

Abstract: A driving circuit and a common electrode are located within a sealant region of the first substrate, wherein the driving circuit includes switch devices and turn-line structures. The common electrode is located within the sealant region of the first substrate. The planar layer is located on the first substrate, wherein the thickness of the planar layer at the turn-line structure of the driving circuit is less than the thicknesses of other portions. The conductive layer is located on the planar layer. A second substrate having an electrode thereon is disposed opposite to the first substrate. A liquid crystal layer is located within the display region between the first substrate and the second substrate. A sealant is located within the sealant region between the first substrate and the second substrate, and conductive balls are distributed in the sealant.

Abstract translation: 驱动电路和公共电极位于第一基板的密封剂区域内，其中驱动电路包括开关装置和开关线结构。 公共电极位于第一基板的密封剂区域内。 平面层位于第一基板上，其中驱动电路的转线结构处的平面层的厚度小于其它部分的厚度。 导电层位于平面层上。 其上具有电极的第二基板设置成与第一基板相对。 液晶层位于第一基板和第二基板之间的显示区域内。 密封剂位于第一基板和第二基板之间的密封剂区域内，导电球分布在密封剂中。

公开(公告)号：US20100149473A1

公开(公告)日：2010-06-17

申请号：US12371927

申请日：2009-02-17

Applicant: Tsai-Hua Guo ,  Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Tsai-Hua Guo ,  Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

IPC: G02F1/1333 ,  H01L21/768

CPC classification number: G02F1/1345 ,  H01L27/124 ,  H01L27/1248

Abstract: A pixel array includes a substrate, scan lines, data lines, active devices, first pads, second pads, first wires, second wires, an insulating layer, an organic planarization layer, first pad electrodes, second pad electrodes and pixel electrodes. The substrate has a display area and a non-display area. The scan lines and the data lines are disposed in the display area. The active devices are disposed in the display area and electrically connected to the scan lines and the data lines. The first and second pads are disposed in the non-display area. The first and second wires are disposed in the non-display area and respectively connected to the first and second pads. The organic planarization layer covers the insulating layer. The first and second pad electrodes are disposed on the organic planarization layer in the non-display area. The pixel electrodes are disposed on the organic planarization layer in the display area.

Abstract translation: 像素阵列包括基板，扫描线，数据线，有源器件，第一焊盘，第二焊盘，第一布线，第二布线，绝缘层，有机平坦化层，第一焊盘电极，第二焊盘电极和像素电极。 基板具有显示区域和非显示区域。 扫描线和数据线被布置在显示区域中。 有源器件设置在显示区域中并电连接到扫描线和数据线。 第一和第二焊盘设置在非显示区域中。 第一和第二导线设置在非显示区域中并且分别连接到第一和第二焊盘。 有机平坦化层覆盖绝缘层。 第一和第二焊盘电极设置在非显示区域中的有机平坦化层上。 像素电极设置在显示区域中的有机平坦化层上。

公开(公告)号：US09239502B2

公开(公告)日：2016-01-19

申请号：US13541757

申请日：2012-07-04

Applicant: Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: G02F1/1343 ,  G02F1/1345 ,  G02F1/1333 ,  H01L27/12 ,  G02F1/1362 ,  G02F1/136

CPC classification number: H01L27/127 ,  G02F1/133345 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2001/13606 ,  G02F2001/136218 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A pixel structure and a manufacturing method thereof are provided. The pixel structure includes a substrate, a scan line, a data line, a first insulating layer, an active device, a second insulating layer, a common electrode and a first pixel electrode. The data line crossed to the scan line is disposed on the substrate and includes a linear transmitting part and a cross-line transmitting part. The first insulating layer covering the scan line and the linear transmitting part is disposed between the scan line and the cross-line transmitting part. The active device, including a gate, an oxide channel, a source and a drain, is connected to the scan line and the data line. The second insulating layer is disposed on the oxide channel and the linear transmitting part. The common electrode is disposed above the linear transmitting part. The first pixel electrode is connected to the drain.

Abstract translation: 提供像素结构及其制造方法。 像素结构包括基板，扫描线，数据线，第一绝缘层，有源器件，第二绝缘层，公共电极和第一像素电极。 与扫描线交叉的数据线设置在基板上，并且包括线性透射部分和交叉线传输部分。 覆盖扫描线的第一绝缘层和线性透射部分设置在扫描线和交叉线传输部分之间。 包括栅极，氧化物通道，源极和漏极的有源器件连接到扫描线和数据线。 第二绝缘层设置在氧化物通道和线性透射部分上。 公共电极设置在线状发送部的上方。 第一像素电极连接到漏极。

公开(公告)号：US08237904B2

公开(公告)日：2012-08-07

申请号：US13337160

申请日：2011-12-26

Applicant: Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

IPC: G02F1/1345 ,  G09G3/36 ,  H01L29/04

CPC classification number: G02F1/13394 ,  G02F1/13454 ,  G02F2001/133388

Abstract: A driving circuit and a common electrode are located within a sealant region of the first substrate, wherein the driving circuit includes switch devices and turn-line structures. The common electrode is located within the sealant region of the first substrate. The planar layer is located on the first substrate, wherein the thickness of the planar layer at the turn-line structure of the driving circuit is less than the thicknesses of other portions. The conductive layer is located on the planar layer. A second substrate having an electrode thereon is disposed opposite to the first substrate. A liquid crystal layer is located within the display region between the first substrate and the second substrate. A sealant is located within the sealant region between the first substrate and the second substrate, and conductive balls are distributed in the sealant.

Abstract translation: 驱动电路和公共电极位于第一基板的密封剂区域内，其中驱动电路包括开关装置和开关线结构。 公共电极位于第一基板的密封剂区域内。 平面层位于第一基板上，其中驱动电路的转线结构处的平面层的厚度小于其它部分的厚度。 导电层位于平面层上。 其上具有电极的第二基板设置成与第一基板相对。 液晶层位于第一基板和第二基板之间的显示区域内。 密封剂位于第一基板和第二基板之间的密封剂区域内，导电球分布在密封剂中。

公开(公告)号：US20130168704A1

公开(公告)日：2013-07-04

申请号：US13483005

申请日：2012-05-29

Applicant: Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Kuo-Yu Huang ,  Te-Chun Huang

IPC: H01L27/15 ,  H01L33/36

CPC classification number: H01L27/1248 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/156

Abstract: A panel is disclosed, in which, a patterned semiconductor layer is formed on an insulation layer. The patterned semiconductor layer includes a portion corresponding to an electrode and another portion corresponding to a wiring trace. The portion corresponding to the electrode may be formed as, for example, a channel, and the other portion corresponding to the wiring trace may protect the wiring trace during fabrication process or in the structure from scratching or corrosion.

Abstract translation: 公开了一种面板，其中在绝缘层上形成图案化的半导体层。 图案化半导体层包括对应于电极的部分和对应于布线迹线的另一部分。 对应于电极的部分可以形成为例如通道，并且对应于布线迹线的另一部分可以在制造过程期间或在结构中保护布线迹线免受刮擦或腐蚀。

公开(公告)号：US08120742B2

公开(公告)日：2012-02-21

申请号：US12369757

申请日：2009-02-12

Applicant: Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

Inventor： Maw-Song Chen ,  Kuo-Yu Huang ,  Te-Chun Huang

IPC: G02F1/1345 ,  G09G3/36 ,  H01L29/04

CPC classification number: G02F1/13394 ,  G02F1/13454 ,  G02F2001/133388

Abstract: A driving circuit and a common electrode are located within a sealant region of the first substrate, wherein the driving circuit includes switch devices and turn-line structures. The common electrode is located within the sealant region of the first substrate. The planar layer is located on the first substrate, wherein the thickness of the planar layer at the turn-line structure of the driving circuit is less than the thicknesses of other portions. The conductive layer is located on the planar layer. A second substrate having an electrode thereon is disposed opposite to the first substrate. A liquid crystal layer is located within the display region between the first substrate and the second substrate. A sealant is located within the sealant region between the first substrate and the second substrate, and conductive balls are distributed in the sealant.

Abstract translation: 驱动电路和公共电极位于第一基板的密封剂区域内，其中驱动电路包括开关装置和开关线结构。 公共电极位于第一基板的密封剂区域内。 平面层位于第一基板上，其中驱动电路的转线结构处的平面层的厚度小于其它部分的厚度。 导电层位于平面层上。 其上具有电极的第二基板设置成与第一基板相对。 液晶层位于第一基板和第二基板之间的显示区域内。 密封剂位于第一基板和第二基板之间的密封剂区域内，导电球分布在密封剂中。