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公开(公告)号:US07344944B2
公开(公告)日:2008-03-18
申请号:US11341073
申请日:2006-01-27
申请人: Kyu-Charn Park , Kwang-Shik Shin , Sung-Nam Chang
发明人: Kyu-Charn Park , Kwang-Shik Shin , Sung-Nam Chang
IPC分类号: H01L21/336
CPC分类号: H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11526 , H01L27/11534 , H01L29/42328
摘要: A non-volatile memory device comprises a gate line that includes a gate dielectric layer, a bottom gate pattern, an inter-gate dielectric and a top gate pattern, which are sequentially stacked. The width of the inter-gate dielectric is narrower than that of the bottom gate pattern.
摘要翻译: 非易失性存储器件包括栅极线,栅极线包括依次堆叠的栅极介电层,底部栅极图案,栅极间电介质和顶栅极图案。 栅极间电介质的宽度比底栅图案的宽度窄。
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公开(公告)号:US20060128070A1
公开(公告)日:2006-06-15
申请号:US11341073
申请日:2006-01-27
申请人: Kyu-Charn Park , Kwang-Shik Shin , Sung-Nam Chang
发明人: Kyu-Charn Park , Kwang-Shik Shin , Sung-Nam Chang
IPC分类号: H01L21/82
CPC分类号: H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11526 , H01L27/11534 , H01L29/42328
摘要: A non-volatile memory device comprises a gate line that includes a gate dielectric layer, a bottom gate pattern, an inter-gate dielectric and a top gate pattern, which are sequentially stacked. The width of the inter-gate dielectric is narrower than that of the bottom gate pattern.
摘要翻译: 非易失性存储器件包括栅极线,栅极线包括依次堆叠的栅极介电层,底部栅极图案,栅极间电介质和顶栅极图案。 栅极间电介质的宽度比底栅图案的宽度窄。
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公开(公告)号:US07061044B2
公开(公告)日:2006-06-13
申请号:US10797754
申请日:2004-03-09
申请人: Kyu-Charn Park , Kwang-Shik Shin , Sung-Nam Chang
发明人: Kyu-Charn Park , Kwang-Shik Shin , Sung-Nam Chang
IPC分类号: H01L29/76
CPC分类号: H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11526 , H01L27/11534 , H01L29/42328
摘要: A non-volatile memory device comprises a gate line that includes a gate dielectric layer, a bottom gate pattern, an inter-gate dielectric and a top gate pattern, which are sequentially stacked. The width of the inter-gate dielectric is narrower than that of the bottom gate pattern.
摘要翻译: 非易失性存储器件包括栅极线,栅极线包括依次堆叠的栅极介电层,底部栅极图案,栅极间电介质和顶栅极图案。 栅极间电介质的宽度比底栅图案的宽度窄。
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公开(公告)号:US06624464B2
公开(公告)日:2003-09-23
申请号:US10001460
申请日:2001-10-29
申请人: Kwang-Shik Shin , Kyu-Charn Park , Sung-Nam Chang , Jung-Dal Choi , Won-Hong Lee
发明人: Kwang-Shik Shin , Kyu-Charn Park , Sung-Nam Chang , Jung-Dal Choi , Won-Hong Lee
IPC分类号: H01L2976
CPC分类号: H01L27/11521 , H01L27/115 , H01L27/11524
摘要: A non-volatile memory cell array having second floating gates with a narrow width, a large height, and slanted side walls. Critical dimension errors due to photolithographic and etching processes are decreased. The difference in the coupling ratio between the memory cells is low thereby improving speed during programming and/or erasing. A second floating gate having a narrower critical dimension than a second floating gate obtained using a photolithographic process may be designed, thereby forming a highly integrated non-volatile memory cell array.
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公开(公告)号:US06376876B1
公开(公告)日:2002-04-23
申请号:US09678917
申请日:2000-10-04
申请人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur
发明人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur
IPC分类号: H01L2978
CPC分类号: H01L27/11521 , H01L27/115
摘要: NAND-type flash memory devices and methods of fabricating the same are provided. The NAND-type flash memory device includes a plurality of isolation layers running parallel with each other, which are formed at predetermined regions of a semiconductor substrate. This device also includes a string selection line pattern, a plurality of word line patterns and a ground selection line pattern which cross over the isolation layers and active regions between the isolation layers. Source regions are formed in the active regions adjacent to the ground selection line patterns and opposite the string selection line pattern. The source regions and the isolation layers between the source regions are covered with a common source line running parallel with the ground selection line pattern.
摘要翻译: 提供了NAND型闪存器件及其制造方法。 NAND型闪速存储器件包括彼此平行延伸的多个隔离层,它们形成在半导体衬底的预定区域。 该装置还包括串联选择线图案,多个字线图案和跨越隔离层和隔离层之间的有源区域的接地选择线图案。 源极区域形成在与地选择线图案相邻的有源区域中并且与串选择线图案相反。 源极区域和源极区域之间的隔离层被与地选择线图案平行延伸的公共源极线覆盖。
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公开(公告)号:US20050023600A1
公开(公告)日:2005-02-03
申请号:US10921656
申请日:2004-08-19
申请人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur , Sang-Bin Song , Jung-Dal Choi
发明人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur , Sang-Bin Song , Jung-Dal Choi
IPC分类号: H01L21/768 , H01L21/8247 , H01L27/115 , H01L29/78 , H01L29/788
CPC分类号: H01L27/11521 , H01L21/76802 , H01L27/115 , H01L27/11524
摘要: NAND-type flash memory devices and methods of fabricating the same are provided. The NAND-type flash memory device includes a plurality of isolation layers running parallel with each other, which are formed at predetermined regions of a semiconductor substrate. This device also includes a string selection line pattern, a plurality of word line patterns and a ground selection line pattern which cross over the isolation layers and active regions between the isolation layers. Source regions are formed in the active regions adjacent to the ground selection line patterns and opposite the string selection line pattern. The source regions and the isolation layers between the source regions are covered with a common source line running parallel with the ground selection line pattern.
摘要翻译: 提供了NAND型闪存器件及其制造方法。 NAND型闪速存储器件包括彼此平行延伸的多个隔离层,它们形成在半导体衬底的预定区域。 该装置还包括串联选择线图案,多个字线图案和跨越隔离层和隔离层之间的有源区域的接地选择线图案。 源极区域形成在与地选择线图案相邻的有源区域中并且与串选择线图案相反。 源极区域和源极区域之间的隔离层被与地选择线图案平行延伸的公共源极线覆盖。
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公开(公告)号:US06936885B2
公开(公告)日:2005-08-30
申请号:US10921656
申请日:2004-08-19
申请人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur , Sang-Bin Song , Jung-Dal Choi
发明人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur , Sang-Bin Song , Jung-Dal Choi
IPC分类号: H01L21/768 , H01L21/8247 , H01L27/115 , H01L29/78 , H01L29/788
CPC分类号: H01L27/11521 , H01L21/76802 , H01L27/115 , H01L27/11524
摘要: NAND-type flash memory devices and methods of fabricating the same are provided. The NAND-type flash memory device includes a plurality of isolation layers running parallel with each other, which are formed at predetermined regions of a semiconductor substrate. This device also includes a string selection line pattern, a plurality of word line patterns and a ground selection line pattern which cross over the isolation layers and active regions between the isolation layers. Source regions are formed in the active regions adjacent to the ground selection line patterns and opposite the string selection line pattern. The source regions and the isolation layers between the source regions are covered with a common source line running parallel with the ground selection line pattern.
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公开(公告)号:US06797570B2
公开(公告)日:2004-09-28
申请号:US10087330
申请日:2002-03-01
申请人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur
发明人: Kwang-Shik Shin , Kyu-Charn Park , Heung-Kwun Oh , Sung-Hoi Hur
IPC分类号: H01L21336
CPC分类号: H01L27/11521 , H01L27/115
摘要: NAND-type flash memory devices and methods of fabricating the same are provided. The NAND-type flash memory device includes a plurality of isolation layers running parallel with each other, which are formed at predetermined regions of a semiconductor substrate. This device also includes a string selection line pattern, a plurality of word line patterns and a ground selection line pattern which cross over the isolation layers and active regions between the isolation layers. Source regions are formed in the active regions adjacent to the ground selection line patterns and opposite the string selection line pattern. The source regions and the isolation layers between the source regions are covered with a common source line running parallel with the ground selection line pattern.
摘要翻译: 提供了NAND型闪存器件及其制造方法。 NAND型闪速存储器件包括彼此平行延伸的多个隔离层,它们形成在半导体衬底的预定区域。 该装置还包括串联选择线图案,多个字线图案和跨越隔离层和隔离层之间的有源区域的接地选择线图案。 源极区域形成在与地选择线图案相邻的有源区域中并且与串选择线图案相反。 源极区域和源极区域之间的隔离层被与地选择线图案平行延伸的公共源极线覆盖。
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公开(公告)号:US06515329B2
公开(公告)日:2003-02-04
申请号:US10068483
申请日:2002-02-05
申请人: Won-Hong Lee , Sung-Nam Chang , Kyu-Charn Park
发明人: Won-Hong Lee , Sung-Nam Chang , Kyu-Charn Park
IPC分类号: H01L29788
CPC分类号: H01L27/11521 , H01L27/115 , H01L27/11524
摘要: Provided are a non-volatile flash memory device and a method of making the non-volatile flash memory device. A common source line is formed simultaneously with the formation of stacked transistors. The common source line is formed of the same material layer as floating gate pattern. The common source region and a scribe line region are simultaneously formed thorough the same photolithography process in a semiconductor substrate. Additionally, the common source line and butted contact are patterned simultaneously through the same photolithography process. Accordingly, the common source line process can be advantageously completed with very low cost and simplicity.
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公开(公告)号:US06380032B1
公开(公告)日:2002-04-30
申请号:US09724152
申请日:2000-11-28
申请人: Won-Hong Lee , Sung-Nam Chang , Kyu-Charn Park
发明人: Won-Hong Lee , Sung-Nam Chang , Kyu-Charn Park
IPC分类号: H01L218247
CPC分类号: H01L27/11521 , H01L27/115 , H01L27/11524
摘要: Provided are a non-volatile flash memory device and a method of making the non-volatile flash memory device. A common source line is formed simultaneously with the formation of stacked transistors. The common source line is formed of the same material layer as floating gate pattern. The common source region and a scribe line region are simultaneously formed thorough the same photolithography process in a semiconductor substrate. Additionally, the common source line and butted contact are patterned simultaneously through the same photolithography process. Accordingly, the common source line process can be advantageously completed with very low cost and simplicity.
摘要翻译: 提供了一种非易失性闪存设备和制造非易失性闪存设备的方法。 共同的源极线与堆叠晶体管的形成同时形成。 公共源极线由与浮动栅极图案相同的材料层形成。 在半导体衬底中通过相同的光刻工艺同时形成公共源极区域和划线区域。 此外,通过相同的光刻工艺,共同的源极线和对接的触点被图案化。 因此,可以以非常低的成本和简单性有利地完成公共源线处理。
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