Abstract:
A display device and a driving method thereof may be capable of compensating for noise caused by image data with inverted image data to cancel a noise component. The device includes a display panel divided into a first area and a second area; a first source driving circuit and a second source driving circuit for providing a source signal to the first area and the second area, respectively; a gate driving circuit for providing a scan signal; a touch driving circuit for applying a touch driving signal and sensing a touch signal; and a timing controller. The timing controller controls corresponding circuits to display first image data on the first area during a first display time, and to provide a source signal corresponding to first inverted data obtained by inverting the first image data to the second area during the first display time.
Abstract:
Disclosed are a display panel having a large area, high resolution, a narrow bezel, low power consumption, and having reduced Resistance Capacitance (RC) delay, and a display device including the same. The display panel includes an Active Area Gate-In-Panel (AAGIP) disposed between adjacent pixel blocks, wherein the AAGIP unit is configured to: connect an n scan line disposed in and along sub-pixels of an n-th row of the pixel block on one side of the AAGIP unit and an n scan line disposed in and along sub-pixels of an (n+1)-th row of the pixel block on the other side thereof to each other; and connect an n+1 scan line disposed in and along sub-pixels of an (n+1)-th row of the pixel block on one side thereof and an n+1 scan line disposed in and along sub-pixels of an n-th row of the pixel block on the other side thereof to each other. Thus, defect such as crosstalk or smear caused by data line transition is reduced.
Abstract:
A display device and method of driving the same are disclosed. The display device that transmits signals between a system board section and a circuit board section through an interface and uses Panel Self-Refresh (hereinafter, abbreviated as ‘PSR’) to reduce power consumption, the circuit board section comprising a PSR controller that, when a PSR On signal is supplied from the system board section, changes the operating frequency of a gate driver and data driver to a frequency higher than a reference frequency for driving the panel with PSR On, set by the system board section.
Abstract:
A display device for low speed drive includes a display panel formed with gate lines and data lines intersecting the gate lines, wherein a pixel is defined by each crossing of the gate lines and the data lines, a source driver supplying a data voltage to the data lines, a gate driver supplying a gate pulse to the gate lines, and a timing controller which time-divides one frame of received data into n sub-frames, where n is a positive integer equal to or greater than 4, groups the gate lines into n gate groups, controls the gate driver to scan the n gate groups in scan sub-frames corresponding to a portion of the n sub-frames, and control the scan order of the n gate groups in a zigzag form.
Abstract:
A display device and a driving method thereof may be capable of compensating for noise caused by image data with inverted image data to cancel a noise component. The device includes a display panel divided into a first area and a second area; a first source driving circuit and a second source driving circuit for providing a source signal to the first area and the second area, respectively; a gate driving circuit for providing a scan signal; a touch driving circuit for applying a touch driving signal and sensing a touch signal; and a timing controller. The timing controller controls corresponding circuits to display first image data on the first area during a first display time, and to provide a source signal corresponding to first inverted data obtained by inverting the first image data to the second area during the first display time.
Abstract:
A disclosed display device includes a display panel with a plurality of pixels and a plurality of signal lines respectively connected to the pixels, and a panel driving circuit to drive the signal lines. The display device further includes a timing controller to receive a first panel self-refresh (PSR) signal and an input image data from a host system, to sense whether the input image data has a preset video format based on the first PSR signal and, if the input image data is sensed to have the preset video format, to control the panel driving circuit to perform normal driving of the signal lines at a first frame frequency in a first group of frames and interlaced low-speed driving of the signal lines at a second frame frequency lower than the first frame frequency in a second group of frames to display the input image data.
Abstract:
A display device includes an image signal processor generating modulation data of each pixel region corresponding to a display period of each frame based on an image signal and predetermined modulation value tables which are preset to different gains. The image signal processor includes a block divider and at least two data modulators. The block divider divides the display region into at least two block regions along a second direction. The at least two data modulators correspond to the at least two block regions, modulate gray scale data of each of pixel regions included in each block region based on a modulation value table, and generate modulation data of the pixel regions included in each block region. As a result, a difference in the charge amount caused by line resistance can be compensated according to the overdriving scheme, resulting in prevention of image quality deterioration.
Abstract:
A display device for low speed drive includes a display panel including gate lines, data lines, and pixels respectively formed at crossings of the gate lines and the data lines, a source driver supplying data voltages to the data lines, a gate driver supplying a gate pulse to the gate lines, and a timing controller which time-divides one frame into n sub-frames, where n is a positive integer equal to or greater than 2, groups the gate lines into n gate groups, controls an operation of the gate driver in each of the n sub-frames to complete a scan operation of a corresponding gate group during a scan period of each of the n sub-frames, generates a buffer operation control signal, and cuts off a driving power source applied to buffers of the source driver during a skip period excluding the scan period from each of the n sub-frames.
Abstract:
A display device includes a display panel including data lines, a source driver positioned at one side of the display panel, and a timing controller which sequentially stores digital video data in a plurality of line memories, starts to generate an output data enable signal in conformity with a first writing start timing of a last line memory of the line memories, adjusts a pulse width of the output data enable signal of each horizontal pixel line based on a previously determined charge time graph, reads out the digital video data from the line memories in synchronization with rising edges of the output data enable signal, and generates a source output enable signal having the same pulse width each time each line memory finishes reading out the data.