THIN FILM TRANSISTOR AND DISPLAY DEVICE COMPRISING THE SAME

    公开(公告)号:US20230140193A1

    公开(公告)日:2023-05-04

    申请号:US17977864

    申请日:2022-10-31

    Abstract: A thin film transistor and a display device comprising the same are provided. The thin film transistor includes an active layer, and a gate electrode at least partially overlapped with the active layer. The active layer includes a channel portion, a first connection portion that is in contact with one side of the channel portion, and a second connection portion that is in contact with the other side of the channel portion. The channel portion includes a first area and a second area that is disposed in parallel with the first area, each of the first area and the second area is extended from the first connection portion to the second connection portion. An effective gate voltage applied to the first area is smaller than that applied to the second area.

    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFATURING THE SAME AND DISPLAY DEVICE USING THE SAME

    公开(公告)号:US20240429242A1

    公开(公告)日:2024-12-26

    申请号:US18749931

    申请日:2024-06-21

    Abstract: A thin film transistor substrate for a display device can include a light blocking layer disposed on a substrate, an active layer overlapping with the light blocking layer, a first lower hole penetrating through the active layer, a gate electrode overlapping with the active layer, a source electrode penetrating through the active layer and contacting with the light blocking layer, an insulating layer disposed on the active layer, and a first upper hole penetrating through the insulating layer. Also, the source electrode includes a first lower electrode disposed in the first lower hole and a first upper electrode disposed in the first upper hole, in which a width of the first upper electrode is greater than a width of the first lower electrode.

    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND ELECTRONIC DEVICE INCLUDING THE SAME

    公开(公告)号:US20230215955A1

    公开(公告)日:2023-07-06

    申请号:US17985634

    申请日:2022-11-11

    CPC classification number: H01L29/78696 H01L29/7869 H01L27/3262 H01L27/1214

    Abstract: Embodiments of the disclosure relate to a thin film transistor array substrate and an electronic device including the same. Specifically, there may be provided a thin film transistor array substrate and an electronic device including the same, which may have high current characteristics in a small area, by including a first electrode, a first insulation film including a hole exposing a portion of an upper surface of the first electrode, an active layer contacting a portion of an upper surface of the first insulation film and the portion of the upper surface of the first electrode, a second insulation film disposed on the active layer, a gate electrode disposed on the second insulation film, a third insulation film disposed on the gate electrode, and a second electrode and a third electrode disposed on the third insulation film, spaced apart from each other, and electrically connected with the active layer, wherein the same signal is applied to the second electrode and the third electrode, wherein the active layer includes a first channel area and a second channel area spaced apart from each other, and wherein the first channel area and the second channel area include an area positioned on a side surface of the hole of the first insulation film.

    THIN FILM TRANSISTOR AND DISPLAY APPARATUS COMPRISING THE SAME

    公开(公告)号:US20240194791A1

    公开(公告)日:2024-06-13

    申请号:US18380359

    申请日:2023-10-16

    Abstract: A thin film transistor comprises an active layer; and a gate electrode spaced apart from the active layer to at least partially overlap the active layer in a plan view. The active layer includes a channel area that is overlapped by the gate electrode in the plan view; a source area connected to one side of the channel area without being overlapped by the gate electrode in the plan view; and a drain area connected to the other side of the channel area without being overlapped by the gate electrode in the plan view. The source area and the drain area are spaced apart from each other with the channel area interposed therebetween. The active layer includes a first source conductorization control area and a first drain conductorization control area, which are spaced apart from each other. The first source conductorization control area corresponds to at least a portion of the channel area in the plan view, and the first drain conductorization control area corresponds to at least a portion of the channel area in the plan view.

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