公开(公告)号：US20020057395A1

公开(公告)日：2002-05-16

申请号：US09983734

申请日：2001-10-25

Applicant: LG.Philips LCD Co., Ltd.

Inventor： Gee Sung Chae ,  Gyoo Chul Jo

IPC: G02F001/136

CPC classification number: G02F1/13458 ,  G02F1/136286 ,  G02F2001/136295

Abstract: A thin film transistor (TFT) array and an LCD (Liquid Crystal Display) panel made therefrom where at least one of the gate lines, the source electrodes, the drain electrodes and the data lines is formed of a copper alloy having a copper portion and a metal portion doped in the copper portion. The metal portion in the copper alloy includes a metal whose heat of metal oxide formation energy is greater than that of copper. The metal may be one selected from Ti (Titanium), Cr (Chromium), Ta (Tantalum), Mo (Molybdenum), In (Indium), Sn (Tin) and Al (Aluminum). The copper alloy has a high acid resistance, a high chemical resistance, and a high tolerance for moisture. The use of the copper alloy allows formation of a low resistance interconnection of copper that has a high electrical conductivity.

Abstract translation: 一种薄膜晶体管（TFT）阵列和由其制成的LCD（液晶显示器）面板，其中至少一个栅极线，源电极，漏极和数据线由具有铜部分的铜合金形成， 在铜部分中掺杂的金属部分。 铜合金中的金属部分包括其金属氧化物形成能的热量大于铜的热量的金属。 金属可以是选自Ti（钛），Cr（铬），Ta（钽），Mo（钼），In（铟），Sn（Tin）和Al（铝）中的一种。 铜合金具有高耐酸性，高耐化学性和高耐湿性。 使用铜合金允许形成具有高导电性的铜的低电阻互连。

公开(公告)号：US20040264212A1

公开(公告)日：2004-12-30

申请号：US10865752

申请日：2004-06-14

Applicant: LG.PHILIPS LCD CO., LTD.

Inventor： In Jae Chung ,  Gee Sung Chae

IPC: H03H009/00 ,  F21V007/04

CPC classification number: G09G3/3413 ,  G02F1/133603 ,  G02F1/133604 ,  G02F1/133609 ,  G09G3/342 ,  G09G2310/024 ,  G09G2360/16

Abstract: A liquid crystal display module includes a liquid crystal display panel, a plurality of lamps for irradiating a first light onto the liquid crystal display panel, and a back light unit including a plurality of light emitting diode arrays, each of the light emitting diode arrays having a plurality of light emitting diodes arranged between the lamps to irradiate a second light onto the liquid crystal display panel.

Abstract translation: 液晶显示模块包括液晶显示面板，用于将第一光照射到液晶显示面板上的多个灯以及包括多个发光二极管阵列的背光单元，每个发光二极管阵列具有 布置在所述灯之间的多个发光二极管以将第二光照射到所述液晶显示面板上。

公开(公告)号：US20030107023A1

公开(公告)日：2003-06-12

申请号：US10293565

申请日：2002-11-14

Applicant: LG.Philips LCD Co., Ltd.

Inventor： Gee Sung Chae ,  Gyoo Chul Jo ,  Yong Sup Hwang

IPC: C03C015/00 ,  C23F001/00 ,  H01L021/00

CPC classification number: H01L21/32134 ,  C23F1/18 ,  C23F1/26 ,  G02F1/133351 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765

Abstract: The present invention discloses an etchant for etching at least two different metal layers, the etchant comprising hydrogen peroxide (H2O2) and one of carboxylic acid, carboxylate salt, and acetyl group (CH3COnull). The present invention also discloses a method of fabricating a metal wiring on a substrate, the method comprising forming a first metal layer on a substrate, forming a second metal layer on the first metal layer, and simultaneously etching the first metal layer and the second metal layer with an etchant comprising hydrogen peroxide (H2O2) and one of carboxylic acid, carboxylate salt, and acetyl group (CH3COnull)

Abstract translation: 本发明公开了用于蚀刻至少两种不同金属层的蚀刻剂，所述蚀刻剂包括过氧化氢（H 2 O 2）和羧酸，羧酸盐和乙酰基（CH 3 CO-）之一。 本发明还公开了一种在基板上制造金属布线的方法，该方法包括在基板上形成第一金属层，在第一金属层上形成第二金属层，同时蚀刻第一金属层和第二金属 含有过氧化氢（H 2 O 2）和羧酸，羧酸盐和乙酰基（CH 3 CO-）之一的蚀刻剂的层，

公开(公告)号：US20030058377A1

公开(公告)日：2003-03-27

申请号：US10133320

申请日：2002-04-29

Applicant: LG.Philips LCD Co., Ltd.

Inventor： Gee Sung Chae ,  Jae Kyun Lee ,  Ik Soo Kim

IPC: G02F001/136

CPC classification number: G02F1/136213 ,  G02F1/133512

Abstract: An array substrate for a liquid crystal display device includes a transparent substrate, a gate line arranged along a first direction on the transparent substrate, a gate electrode extending from the gate line, a common line arranged along the first direction adjacent to the gate line and having a protrusion, a gate insulation layer on the transparent substrate to cover the gate line, the gate electrode, and the common electrode, an active layer on the gate insulation layer and over the gate electrode, first and second ohmic contact layers on the active layer, a data line arranged along a second direction perpendicular to the first upon the gate insulation layer, a source electrode extending from the data line and contacting the first ohmic contact layer, a drain electrode spaced apart from the source electrode and contacting the second ohmic contact layer, a first capacitor electrode formed on the gate insulation layer and connected to the drain electrode, the first capacitor electrode overlapping the common line and the protrusion of the common line, a passivation layer formed on the gate insulation layer to cover the data line, the source and drain electrodes, and the first capacitor electrode, the passivation layer having a first contact hole exposing a portion of the capacitor electrode, and a pixel electrode formed on the passivation layer and contacting the first capacitor electrode through the first contact hole.