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    Accelerator for a read-channel design and simulation tool
    1.
    发明授权
    Accelerator for a read-channel design and simulation tool 有权
    加速器，用于读通道设计和仿真工具

    公开(公告)号：US08713495B2

    公开(公告)日：2014-04-29

    申请号：US13780222

    申请日：2013-02-28

    Applicant: LSI Corporation

    Inventor： Pavel Aleksandrovich Aliseychik ,  Aleksey Alexandrovich Letunovskiy ,  Alexander Alexandrovich Petyushko ,  Denis Vladimirovich Parkhomenko ,  Alexander Borisovich Kholodenko

    IPC: G06F17/50

    CPC classification number: G06F17/5022 ,  G06F17/5045 ,  G06F17/505

    Abstract: A computer-aided design method for developing, simulating, and testing a read-channel architecture to be implemented in a VLSI circuit. The method uses a coset operating mode and nonzero-syndrome-based decoding to accelerate the simulation of the read-channel's error-rate characteristics corresponding to different parity-check matrices employed in the read-channel's turbo-decoder, such as a low-density parity-check decoder. The acceleration is achieved through recycling some previously generated log-likelihood-ratio values, which enables the method to sometimes bypass certain time-consuming processing steps therein.

    Abstract translation: 一种用于开发，仿真和测试在VLSI电路中实现的读通道架构的计算机辅助设计方法。 该方法使用陪集操作模式和基于非零校正的解码来加速对于在读通道的turbo解码器中采用的不同奇偶校验矩阵对应的读通道的误码率特性的模拟，例如低密度 奇偶校验解码器。 通过再循环一些先前产生的对数似然比值来实现加速，这使得该方法有时可以绕过其中一些耗时的处理步骤。

    Three-dimensional region of interest tracking based on key frame matching
    2.
    发明授权
    Three-dimensional region of interest tracking based on key frame matching 有权
    基于关键帧匹配的三维感兴趣区域跟踪

    公开(公告)号：US09336431B2

    公开(公告)日：2016-05-10

    申请号：US13973040

    申请日：2013-08-22

    Applicant: LSI Corporation

    Inventor： Ivan Leonidovich Mazurenko ,  Alexander Alexandrovich Petyushko ,  Denis Vladimirovich Parkhomenko ,  Alexander Borisovich Kholodenko ,  Dmitry Nicolaevich Babin

    IPC: G06K9/00 ,  G06T7/20

    CPC classification number: G06K9/00201 ,  G06T7/248 ,  G06T2207/10016 ,  G06T2207/10028 ,  G06T2207/30201

    Abstract: A method and system for key frame based region of interest (ROI) tracking is disclosed. The method includes storing a key ROI set in a key ROI buffer, the key ROI set including at least one key ROI; designating one of the key ROI in the key ROI set as an active key ROI; receiving a point cloud representing a particular ROI to be processed for tracking; establishing a correspondence between that particular ROI and the active key ROI; determining whether to switch the active key designation to another key ROI in the key ROI set and switching the active key designation accordingly; and determining whether to modify the key ROI set and modifying the key ROI set accordingly.

    Abstract translation: 公开了一种基于关键帧的感兴趣区域（ROI）跟踪的方法和系统。 该方法包括将关键ROI集合存储在关键ROI缓冲器中，所述关键ROI集合包括至少一个关键ROI; 指定关键投资回报率作为主要投资回报率的关键ROI之一; 接收代表要进行跟踪的特定ROI的点云; 建立该特定ROI与活动密钥ROI之间的对应关系; 确定在所述关键ROI集合中是否将活动密钥指定切换到另一关键ROI，并相应地切换所述活动密钥指定; 并确定是否修改关键的ROI集合并相应地修改关键的ROI集合。

    Test signal generator for low-density parity-check decoder
    3.
    发明授权
    Test signal generator for low-density parity-check decoder 有权
    用于低密度奇偶校验解码器的测试信号发生器

    公开(公告)号：US09294128B2

    公开(公告)日：2016-03-22

    申请号：US14027371

    申请日：2013-09-16

    Applicant: LSI Corporation

    Inventor： Denis Vladimirovich Zaytsev ,  Ivan Leonidovich Mazurenko ,  Alexander Alexandrovich Petyushko ,  Aleksey Alexandrovich Letunovskiy ,  Pavel Aleksandrovich Aliseitchik ,  Dmitry Nicolaevich Babin

    IPC: H03M13/13 ,  H03M13/11 ,  H03M13/01

    CPC classification number: H03M13/1102 ,  H03M13/015 ,  H03M13/1142

    Abstract: A method for estimating error rates in low-density parity check codes includes calibrating an encoder according to specific channel parameters and according to dominant error events in the low-density parity-check code. Dominant codewords are classified based on characteristics of each codeword that are likely to produce similar error rates at similar noise levels; codeword classes that produce the highest error rate are then tested. Error boundary distance is estimated using multiple binary searches on segments. Segments are defined based on codeword, trapping set and biasing noise components of the channel. To improve calculation speed the most significant subclasses of codewords, trapping sets and noise signals are used.

    Abstract translation: 用于估计低密度奇偶校验码中的误码率的方法包括根据特定信道参数和根据低密度奇偶校验码中的主要误差事件来校准编码器。 主要码字基于每个码字的特征进行分类，这些特征可能在类似噪声水平下产生类似的错误率; 然后测试产生最高错误率的码字类。 使用段上的多个二进制搜索来估计误差边界距离。 基于信道的码字，陷印集和偏置噪声分量来定义分段。 为了提高计算速度，使用码字，陷阱集和噪声信号的最重要的子类。

    Three-Dimensional Region of Interest Tracking Based on Key Frame Matching
    5.
    发明申请
    Three-Dimensional Region of Interest Tracking Based on Key Frame Matching 有权
    基于关键帧匹配的三维兴趣跟踪区域

    公开(公告)号：US20140226854A1

    公开(公告)日：2014-08-14

    申请号：US13973040

    申请日：2013-08-22

    Applicant: LSI Corporation

    Inventor： Ivan Leonidovich Mazurenko ,  Alexander Alexandrovich Petyushko ,  Denis Vladimirovich Parkhomenko ,  Alexander Borisovich Kholodenko ,  Dmitry Nicolaevich Babin

    IPC: G06K9/00

    CPC classification number: G06K9/00201 ,  G06T7/248 ,  G06T2207/10016 ,  G06T2207/10028 ,  G06T2207/30201

    Abstract: A method and system for key frame based region of interest (ROI) tracking is disclosed. The method includes storing a key ROI set in a key ROI buffer, the key ROI set including at least one key ROI; designating one of the key ROI in the key ROI set as an active key ROI; receiving a point cloud representing a particular ROI to be processed for tracking; establishing a correspondence between that particular ROI and the active key ROI; determining whether to switch the active key designation to another key ROI in the key ROI set and switching the active key designation accordingly; and determining whether to modify the key ROI set and modifying the key ROI set accordingly.

    Abstract translation: 公开了一种基于关键帧的感兴趣区域（ROI）跟踪的方法和系统。 该方法包括将关键ROI集合存储在关键ROI缓冲器中，所述关键ROI集合包括至少一个关键ROI; 指定关键投资回报率作为主要投资回报率的关键ROI之一; 接收代表要进行跟踪的特定ROI的点云; 建立该特定ROI与活动密钥ROI之间的对应关系; 确定在所述关键ROI集合中是否将活动密钥指定切换到另一关键ROI，并相应地切换所述活动密钥指定; 并确定是否修改关键的ROI集合并相应地修改关键的ROI集合。

    SUPERRESOLUTION IMAGE PROCESSING USING AN INVERTIBLE SPARSE MATRIX
    6.
    发明申请
    SUPERRESOLUTION IMAGE PROCESSING USING AN INVERTIBLE SPARSE MATRIX 审中-公开
    使用可逆的SPARSE矩阵进行超分辨率图像处理

    公开(公告)号：US20140193092A1

    公开(公告)日：2014-07-10

    申请号：US13950384

    申请日：2013-07-25

    Applicant: LSI Corporation

    Inventor： Alexander Alexandrovich Petyushko ,  Dmitry Nikolaevich Babin ,  Ivan Leonidovich Mazurenko ,  Alexander Borisovich Kholodenko

    IPC: G06K9/46

    CPC classification number: G06T3/4053

    Abstract: Superresolution image processing that can be applied when two image frames of the same scene are available so that image information from one frame can be used to enhance the image from the other frame. The superresolution image processing uses a sparse matrix generated based on a Markov random field defined over these two image frames. The sparse matrix is inverted and applied to the image data from the image frame that is being enhanced to generate a corresponding enhanced image.

    Abstract translation: 可以在相同场景的两个图像帧可用时应用的超分辨率图像处理，使得可以使用来自一个帧的图像信息来增强来自另一帧的图像。 超分辨率图像处理使用基于在这两个图像帧上定义的马尔科夫随机场生成的稀疏矩阵。 稀疏矩阵被反转并应用于正被增强的图像帧的图像数据以产生相应的增强图像。

    Test Signal Generator for Low-Density Parity-Check Decoder
    7.
    发明申请
    Test Signal Generator for Low-Density Parity-Check Decoder 有权
    用于低密度奇偶校验解码器的测试信号发生器

    公开(公告)号：US20140245086A1

    公开(公告)日：2014-08-28

    申请号：US14027371

    申请日：2013-09-16

    Applicant: LSI Corporation

    Inventor： Denis Vladimirovich Zaytsev ,  Ivan Leonidovich Mazurenko ,  Alexander Alexandrovich Petyushko ,  Aleksey Alexandrovich Letunovskiy ,  Pavel Aleksandrovich Aliseitchik ,  Dmitry Nicolaevich Babin

    IPC: H03M13/13

    CPC classification number: H03M13/1102 ,  H03M13/015 ,  H03M13/1142

    Abstract: A method for estimating error rates in low-density parity check codes includes calibrating an encoder according to specific channel parameters and according to dominant error events in the low-density parity-check code. Dominant codewords are classified based on characteristics of each codeword that are likely to produce similar error rates at similar noise levels; codeword classes that produce the highest error rate are then tested. Error boundary distance is estimated using multiple binary searches on segments. Segments are defined based on codeword, trapping set and biasing noise components of the channel. To improve calculation speed the most significant subclasses of codewords, trapping sets and noise signals are used.

    Abstract translation: 用于估计低密度奇偶校验码中的误码率的方法包括根据特定信道参数和根据低密度奇偶校验码中的主要误差事件来校准编码器。 主要码字基于每个码字的特征进行分类，这些特征可能在类似噪声水平下产生类似的错误率; 然后测试产生最高错误率的码字类。 使用段上的多个二进制搜索来估计误差边界距离。 基于信道的码字，陷印集和偏置噪声分量来定义分段。 为了提高计算速度，使用码字，陷阱集和噪声信号的最重要的子类。

    TRAPPING-SET DATABASE FOR A LOW-DENSITY PARITY-CHECK DECODER
    8.
    发明申请
    TRAPPING-SET DATABASE FOR A LOW-DENSITY PARITY-CHECK DECODER 有权
    用于低密度奇偶校验解码器的捕捉集数据库

    公开(公告)号：US20140122960A1

    公开(公告)日：2014-05-01

    申请号：US13915823

    申请日：2013-06-12

    Applicant: LSI Corporation

    Inventor： Pavel Aleksandrovich Aliseychik ,  Denis Vasilevich Parfenov ,  Alexander Nikolaevich Filippov ,  Alexander Alexandrovich Petyushko ,  Denis Vladimirovich Parkhomenko

    IPC: H03M13/17

    CPC classification number: H03M13/1142

    Abstract: A machine-implemented method of generating trapping-set information for use in LDPC-decoding processing of read signals generated, e.g., by sensing a storage medium, such as a magnetic platter. In one embodiment, the method can be implemented as an add-on to any other trapping-set search method in which the discovered trapping sets are evaluated to determine their influence on the overall bit-error rate and/or error-floor characteristics of the LDPC decoder. The method can advantageously reuse at least some of the computational results obtained during this evaluation, thereby requiring a relatively small amount of additional computations, while providing a significant benefit of discovering many more trapping sets in addition to the ones that are being evaluated.

    Abstract translation: 一种生成捕获组信息的机器实现方法，用于例如通过感测诸如磁盘的存储介质产生的读取信号的LDPC解码处理中使用。 在一个实施例中，该方法可以被实现为任何其他捕集集搜索方法的附加，其中所发现的捕获集合被评估以确定它们对整体误码率和/或误差层特性的影响 LDPC解码器。 该方法可以有利地重用在该评估期间获得的计算结果中的至少一些，从而需要相对少量的附加计算，同时除了正在评估的那些外，还提供了发现更多的捕获集合的显着益处。

    PREAMBLE DETECTION USING VECTOR PROCESSORS
    9.
    发明申请
    PREAMBLE DETECTION USING VECTOR PROCESSORS 有权
    使用矢量处理器的前瞻性检测

    公开(公告)号：US20140064338A1

    公开(公告)日：2014-03-06

    申请号：US13800167

    申请日：2013-03-13

    Applicant: LSI CORPORATION

    Inventor： Meng-Lin Yu ,  Jian-Guo Chen ,  Alexander Alexandrovich Petyushko ,  Ivan Leonidovich Mazurenko

    IPC: H04B1/709

    CPC classification number: H04B1/709 ,  H04B1/7113

    Abstract: In one embodiment, a programmable vector processor performs preamble detection in a wireless communication network. Implementation of preamble detection in the vector processor is made possible by a set of vector instructions that include (i) a circular load instruction for loading vectors of received data, (ii) a correlation instruction for correlating the vectors of received data with vectors of the scrambling code to concurrently generate a plurality of complex correlations, (iii) a partial-transpose instruction for arranging vectors of the complex correlations for use by a Fast Hadamard Transform (FHT) processor, and (iv) an FHT instruction for performing FHT processing on a vector of complex correlations. Implementing preamble detection in the vector processor allows more of the received data to be processed concurrently. As a result, preamble detectors of the disclosure may detect preambles using fewer clock cycles than that of comparable preamble detectors implemented using hardware accelerators.

    Abstract translation: 在一个实施例中，可编程向量处理器在无线通信网络中执行前导码检测。 矢量处理器中的前导码检测的实现可以通过一组向量指令成为可能的，该矢量指令包括（i）用于加载接收数据的向量的循环加载指令，（ii）将接收到的数据的向量与 扰码以同时产生多个复相关，（iii）用于排列复数相关的向量的部分转置指令，供快速哈达马变换（FHT）处理器使用，以及（iv）用于对FHT处理执行FHT处理的FHT指令 复杂相关的向量。 在矢量处理器中实现前同步码检测允许更多的接收数据被同时处理。 结果，本公开的前同步码检测器可以使用比使用硬件加速器实现的可比较的前同步码检测器更少的时钟周期来检测前同步码。

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