-
公开(公告)号：US20180234270A1
公开(公告)日：2018-08-16
申请号：US15434791
申请日：2017-02-16
发明人： Hiroshi KIMURA , Haoqiong Chen , Yehui Sun
IPC分类号： H04L25/03
CPC分类号： H04L25/03025 , H03K17/161 , H03K19/017509 , H04L25/03343 , H04L27/01
摘要： To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation.
-
公开(公告)号：US09806916B1
公开(公告)日：2017-10-31
申请号：US15490725
申请日：2017-04-18
申请人： Rambus Inc.
CPC分类号： H04L25/03019 , H04B1/1081 , H04L7/0058 , H04L7/0087 , H04L7/0331 , H04L25/03025 , H04L25/03038 , H04L25/03057 , H04L25/03343 , H04L25/03885
摘要： A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.
-
公开(公告)号：US09660840B1
公开(公告)日：2017-05-23
申请号：US15209454
申请日：2016-07-13
申请人： Rambus Inc.
IPC分类号： H04L25/03
CPC分类号： H04L25/03019 , H04B1/1081 , H04L7/0058 , H04L7/0087 , H04L7/0331 , H04L25/03025 , H04L25/03038 , H04L25/03057 , H04L25/03343 , H04L25/03885
摘要： A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.
-
公开(公告)号：US20170070367A1
公开(公告)日：2017-03-09
申请号：US15210422
申请日：2016-07-14
发明人： William J. Dally
CPC分类号： H04L25/03019 , H04B1/0483 , H04B1/1081 , H04B1/16 , H04B3/04 , H04L1/0042 , H04L25/0272 , H04L25/0282 , H04L25/03025 , H04L25/03343 , H04L25/03878 , H04L25/03885 , H04L27/01
摘要： An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.
摘要翻译： 提供在数字发射机中的均衡器补偿信号到数字接收机的信号衰减。 均衡器产生信号电平作为位历史的逻辑功能，以强调相对于重复信号电平的转换信号电平。 优选的均衡器包括使用查找表的FIR转换滤波器。 包括FIR滤波器和数模转换器的并行电路为低速电路提供高速均衡器。 均衡器特别适用于柜内和局域网传输，其中反馈电路有助于均衡器的自适应训练。
-
公开(公告)号：US09252865B2
公开(公告)日：2016-02-02
申请号：US14590887
申请日：2015-01-06
申请人： Kenneth F Rilling
发明人： Kenneth F Rilling
CPC分类号： H04B1/1081 , H04B1/10 , H04B7/0848 , H04B7/0851 , H04B7/086 , H04B7/0862 , H04L25/03019 , H04L25/03025 , H04L25/03885 , H04L27/2649 , H04L27/38
摘要： The present invention reduces the degradation in performance of one or more radio signals that are co-transmitted with a first radio signal from the same transmitting antenna in the same frequency channel and received by the same antenna due to multipath or other shared interference, where the one or more radio signals can be separated from the first radio signal. All received signals are coupled to the same adaptive array or adaptive filter to reduce multipath or other shared interference of the first radio signal, which reduces multipath and other shared interference in the other radio signals before they are separated and processed by their respective receivers, or the individual radio signals are separated before the first signal enters the adaptive array and coupled to a slave weighting network slaved to the weights of the adaptive array of the first signal to reduce interference in all the signals.
-
公开(公告)号：US20140286386A1
公开(公告)日：2014-09-25
申请号：US14296203
申请日：2014-06-04
申请人： Kenneth F. Rilling
发明人： Kenneth F. Rilling
IPC分类号： H04L25/03
CPC分类号： H04B1/1081 , H04B1/10 , H04B7/0848 , H04B7/0851 , H04B7/086 , H04B7/0862 , H04L25/03019 , H04L25/03025 , H04L25/03885 , H04L27/2649 , H04L27/38
摘要： The present invention reduces the degradation in performance of one or more radio signals that are co-transmitted with a first radio signal from the same transmitting antenna in the same frequency channel and received by the same antenna due to multipath or other shared interference, where the one or more radio signals can be separated from the first radio signal. All received signals are coupled to the same adaptive array or adaptive filter to reduce multipath or other shared interference of the first radio signal, which reduces multipath and other shared interference in the other radio signals before they are separated and processed by their respective receivers, or the individual radio signals are separated before the first signal enters the adaptive array and coupled to a slave weighting network slaved to the weights of the adaptive array of the first signal to reduce interference in all the signals.
摘要翻译： 本发明减少了由同一频道中的相同发射天线与由多路径或其他共享干扰由同一天线接收的第一无线电信号共发射的一个或多个无线电信号的性能下降，其中 一个或多个无线电信号可以与第一无线电信号分离。 所有接收到的信号都耦合到相同的自适应阵列或自适应滤波器，以减少第一无线电信号的多路径或其他共享干扰，这在其他无线电信号被它们各自的接收机分离和处理之前减少多径和其他共享干扰，或者 各个无线电信号在第一信号进入自适应阵列之前被分离，并且耦合到从属加权网络，从属于第一信号的自适应阵列的权重，以减少所有信号中的干扰。
-
公开(公告)号：US20140286383A1
公开(公告)日：2014-09-25
申请号：US14145960
申请日：2014-01-01
申请人： Rambus Inc.
CPC分类号： H04L25/03019 , H04B1/1081 , H04L7/0058 , H04L7/0087 , H04L7/0331 , H04L25/03025 , H04L25/03038 , H04L25/03057 , H04L25/03343 , H04L25/03885
摘要： A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.
摘要翻译： 一种具有可选择抽头均衡器的信令电路。 信令电路包括缓冲器，选择电路和均衡电路。 缓冲器用于存储对应于在第一时间间隔期间在信令路径上发送的数据信号的多个数据值。 选择电路耦合到缓冲器，以根据选择值从多个数据值中选择数据值的子集。 均衡电路被耦合以从选择电路接收数据值的子集，并且适于根据数据值的子集来调整对应于在第二时间间隔期间在信令路径上发送的数据信号的信号电平。
-
公开(公告)号：US20140269879A1
公开(公告)日：2014-09-18
申请号：US14170685
申请日：2014-02-03
发明人： William J. Dally
CPC分类号： H04L25/03019 , H04B1/0483 , H04B1/1081 , H04B1/16 , H04B3/04 , H04L1/0042 , H04L25/0272 , H04L25/0282 , H04L25/03025 , H04L25/03343 , H04L25/03878 , H04L25/03885 , H04L27/01
摘要： An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.
-
公开(公告)号：US08761235B2
公开(公告)日：2014-06-24
申请号：US13914350
申请日：2013-06-10
发明人： William J. Dally
CPC分类号： H04L25/03019 , H04B1/0483 , H04B1/1081 , H04B1/16 , H04B3/04 , H04L1/0042 , H04L25/0272 , H04L25/0282 , H04L25/03025 , H04L25/03343 , H04L25/03878 , H04L25/03885 , H04L27/01
摘要： An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer using signal levels in sequences to represent different frequencies.
摘要翻译： 提供在数字发射机中的均衡器补偿信号到数字接收机的信号衰减。 均衡器产生信号电平作为位历史的逻辑功能，以强调相对于重复信号电平的转换信号电平。 优选的均衡器包括使用查找表的FIR转换滤波器。 包括FIR滤波器和数模转换器的并行电路为低速电路提供高速均衡器。 均衡器特别适用于机柜内和局域网传输，其中反馈电路有助于均衡器的自适应训练，使用序列中的信号电平来表示不同的频率。
-
公开(公告)号：US20140146901A1
公开(公告)日：2014-05-29
申请号：US14170324
申请日：2014-01-31
发明人： William J. Dally
IPC分类号： H04B3/04
CPC分类号： H04L25/03019 , H04B1/0483 , H04B1/1081 , H04B1/16 , H04B3/04 , H04L1/0042 , H04L25/0272 , H04L25/0282 , H04L25/03025 , H04L25/03343 , H04L25/03878 , H04L25/03885 , H04L27/01
摘要： An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.
摘要翻译： 提供在数字发射机中的均衡器补偿信号到数字接收机的信号衰减。 均衡器产生信号电平作为位历史的逻辑功能，以强调相对于重复信号电平的转换信号电平。 优选的均衡器包括使用查找表的FIR转换滤波器。 包括FIR滤波器和数模转换器的并行电路为低速电路提供高速均衡器。 均衡器特别适用于柜内和局域网传输，其中反馈电路有助于均衡器的自适应训练。
-
-
-
-
-
-
-
-
-
搜索结果
148 条记录 (耗时 0.031 秒)
