Collective acceleration unit tree flow control and retransmit
    1.
    发明授权
    Collective acceleration unit tree flow control and retransmit 失效
    集体加速单位树流控制和重传

    公开(公告)号:US08417778B2

    公开(公告)日:2013-04-09

    申请号:US12640208

    申请日:2009-12-17

    IPC分类号: G06F15/16

    CPC分类号: G06F15/16

    摘要: A mechanism is provided for collective acceleration unit tree flow control forms a logical tree (sub-network) among those processors and transfers “collective” packets on this tree. The system supports many collective trees, and each collective acceleration unit (CAU) includes resources to support a subset of the trees. Each CAU has limited buffer space, and the connection between two CAUs is not completely reliable. Therefore, to address the challenge of collective packets traversing on the tree without colliding with each other for buffer space and guaranteeing the end-to-end packet delivery, each CAU in the system effectively flow controls the packets, detects packet loss, and retransmits lost packets.

    摘要翻译: 提供了一种用于集体加速单元树流控制的机制,形成这些处理器之间的逻辑树(子网),并在该树上传送集合分组。 系统支持许多集体树,每个集体加速单元(CAU)包括支持一部分树的资源。 每个CAU具有有限的缓冲区空间,两个CAU之间的连接不是完全可靠的。 因此,为了解决在树上遍历的集合分组的挑战,不会相互冲突,保证端到端的分组传递,系统中的每个CAU都有效地流量控制分组,检测分组丢失,重传丢失 数据包

    Collective Acceleration Unit Tree Flow Control and Retransmit
    2.
    发明申请
    Collective Acceleration Unit Tree Flow Control and Retransmit 失效
    集体加速单位树流量控制和重新发布

    公开(公告)号:US20110173258A1

    公开(公告)日:2011-07-14

    申请号:US12640208

    申请日:2009-12-17

    IPC分类号: G06F15/16

    CPC分类号: G06F15/16

    摘要: A mechanism is provided for collective acceleration unit tree flow control forms a logical tree (sub-network) among those processors and transfers “collective” packets on this tree. The system supports many collective trees, and each collective acceleration unit (CAU) includes resources to support a subset of the trees. Each CAU has limited buffer space, and the connection between two CAUs is not completely reliable. Therefore, to address the challenge of collective packets traversing on the tree without colliding with each other for buffer space and guaranteeing the end-to-end packet delivery, each CAU in the system effectively flow controls the packets, detects packet loss, and retransmits lost packets.

    摘要翻译: 提供了一种用于集体加速单元树流控制的机制,形成这些处理器之间的逻辑树(子网),并在该树上传输“集合”分组。 系统支持许多集体树,每个集体加速单元(CAU)包括支持一部分树的资源。 每个CAU具有有限的缓冲区空间,两个CAU之间的连接不是完全可靠的。 因此,为了解决在树上遍历的集合分组的挑战,不会相互冲突,保证端到端的分组传递,系统中的每个CAU都有效地流量控制分组,检测分组丢失,重传丢失 数据包

    Collective Acceleration Unit Tree Structure
    3.
    发明申请
    Collective Acceleration Unit Tree Structure 有权
    集体加速单位树结构

    公开(公告)号:US20110238956A1

    公开(公告)日:2011-09-29

    申请号:US12749100

    申请日:2010-03-29

    摘要: A mechanism is provided in a collective acceleration unit for performing a collective operation to distribute or collect data among a plurality of participant nodes. The mechanism receives an input collective packet for a collective operation from a neighbor node within a collective tree. The input collective packet comprises a tree identifier and an input data field and wherein the collective tree comprises a plurality of sub trees. The mechanism maps the tree identifier to an index within the collective acceleration unit. The index identifies a portion of resources within the collective acceleration unit and is associated with a set of neighbor nodes in a given sub tree within the collective tree. For each neighbor node the collective acceleration unit stores destination information. The collective acceleration unit performs an operation on the input data field using the portion of resources to effect the collective operation.

    摘要翻译: 在集体加速单元中提供一种用于执行集合操作以在多个参与者节点之间分发或收集数据的机制。 该机制从集体树中的邻居节点接收用于集体操作的输入集合分组。 所述输入集合分组包括树标识符和输入数据字段,并且其中所述集合树包括多个子树。 该机制将树标识符映射到集体加速单元内的索引。 索引识别集体加速单元内的资源的一部分,并且与集合树内的给定子树中的一组相邻节点相关联。 对于每个邻居节点,集体加速单元存储目的地信息。 集体加速单元使用资源部分对输入数据字段进行操作以实现集体操作。

    Collective acceleration unit tree structure
    5.
    发明授权
    Collective acceleration unit tree structure 有权
    集体加速单位树结构

    公开(公告)号:US08751655B2

    公开(公告)日:2014-06-10

    申请号:US12749100

    申请日:2010-03-29

    IPC分类号: G06F15/173

    摘要: A mechanism is provided in a collective acceleration unit for performing a collective operation to distribute or collect data among a plurality of participant nodes. The mechanism receives an input collective packet for a collective operation from a neighbor node within a collective tree. The input collective packet comprises a tree identifier and an input data field and wherein the collective tree comprises a plurality of sub trees. The mechanism maps the tree identifier to an index within the collective acceleration unit. The index identifies a portion of resources within the collective acceleration unit and is associated with a set of neighbor nodes in a given sub tree within the collective tree. For each neighbor node the collective acceleration unit stores destination information. The collective acceleration unit performs an operation on the input data field using the portion of resources to effect the collective operation.

    摘要翻译: 在集体加速单元中提供一种用于执行集合操作以在多个参与者节点之间分发或收集数据的机制。 该机制从集体树中的邻居节点接收用于集体操作的输入集合分组。 所述输入集合分组包括树标识符和输入数据字段,并且其中所述集合树包括多个子树。 该机制将树标识符映射到集体加速单元内的索引。 索引识别集体加速单元内的资源的一部分,并且与集合树内的给定子树中的一组相邻节点相关联。 对于每个邻居节点,集体加速单元存储目的地信息。 集体加速单元使用资源部分对输入数据字段进行操作以实现集体操作。

    Collective Acceleration Unit Tree Structure
    6.
    发明申请
    Collective Acceleration Unit Tree Structure 有权
    集体加速单位树结构

    公开(公告)号:US20120296915A1

    公开(公告)日:2012-11-22

    申请号:US13454727

    申请日:2012-04-24

    IPC分类号: G06F17/30

    摘要: A mechanism is provided in a collective acceleration unit for performing a collective operation to distribute or collect data among a plurality of participant nodes. The mechanism receives an input collective packet for a collective operation from a neighbor node within a collective tree. The input collective packet comprises a tree identifier and an input data field and wherein the collective tree comprises a plurality of sub trees. The mechanism maps the tree identifier to an index within the collective acceleration unit. The index identifies a portion of resources within the collective acceleration unit and is associated with a set of neighbor nodes in a given sub tree within the collective tree. For each neighbor node the collective acceleration unit stores destination information. The collective acceleration unit performs an operation on the input data field using the portion of resources to effect the collective operation.

    摘要翻译: 在集体加速单元中提供一种用于执行集合操作以在多个参与者节点之间分发或收集数据的机制。 该机制从集体树中的邻居节点接收用于集体操作的输入集合分组。 所述输入集合分组包括树标识符和输入数据字段,并且其中所述集合树包括多个子树。 该机制将树标识符映射到集体加速单元内的索引。 索引识别集体加速单元内的资源的一部分,并且与集合树内的给定子树中的一组相邻节点相关联。 对于每个邻居节点,集体加速单元存储目的地信息。 集体加速单元使用资源部分对输入数据字段进行操作以实现集体操作。

    Cluster-wide system clock in a multi-tiered full-graph interconnect architecture
    7.
    发明授权
    Cluster-wide system clock in a multi-tiered full-graph interconnect architecture 有权
    多层全图互连架构中的群集范围的系统时钟

    公开(公告)号:US07921316B2

    公开(公告)日:2011-04-05

    申请号:US11853522

    申请日:2007-09-11

    IPC分类号: G06F1/00 G06F1/04 G06F1/12

    CPC分类号: G06F1/10 G06F1/12

    摘要: Mechanisms for providing a cluster-wide system clock in a multi-tiered full graph (MTFG) interconnect architecture are provided. Heartbeat signals transmitted by each of the processor chips in the computing cluster are synchronized. Internal system clock signals are generated in each of the processor chips based on the synchronized heartbeat signals. As a result, the internal system clock signals of each of the processor chips are synchronized since the heartbeat signals, that are the basis for the internal system clock signals, are synchronized. Mechanisms are provided for performing such synchronization using direct couplings of processor chips within the same processor book, different processor books in the same supernode, and different processor books in different supernodes of the MTFG interconnect architecture.

    摘要翻译: 提供了一种在多层全图(MTFG)互连架构中提供集群范围的系统时钟的机制。 计算群集中的每个处理器芯片发送的心跳信号同步。 基于同步的心跳信号,在每个处理器芯片中产生内部系统时钟信号。 结果,每个处理器芯片的内部系统时钟信号被同步,因为作为内部系统时钟信号的基础的心跳信号被同步。 提供了用于使用同一处理器书中的处理器芯片的直接耦合,同一超级节点中的不同处理器书以及MTFG互连体系结构的不同超节点中的不同处理器簿来执行这种同步的机制。

    System and Method for Performing Dynamic Request Routing Based on Broadcast Source Request Information
    8.
    发明申请
    System and Method for Performing Dynamic Request Routing Based on Broadcast Source Request Information 有权
    基于广播源请求信息执行动态请求路由的系统和方法

    公开(公告)号:US20090198958A1

    公开(公告)日:2009-08-06

    申请号:US12024553

    申请日:2008-02-01

    IPC分类号: G06F13/14 G06F9/02

    CPC分类号: H04L45/122 H04L45/06

    摘要: A system and method for performing dynamic request routing based on broadcast source request information are provided. Each processor chip in the system may use a synchronized heartbeat signal it generates to provide source request information to each of the other processor chips in the system. The source request information identifies the number of active source requests sent by the processor chip that originated the heartbeat signal. The source request information from each of the processor chips in the system may be used by the processor chips in determining optimal routing paths for data from a source processor chip to a destination processor chip. As a result, the congestion of data for processing at each of the processor chips along each possible routing path may be taken into account when selecting to which processor chip to forward data.

    摘要翻译: 提供了一种基于广播源请求信息进行动态请求路由的系统和方法。 系统中的每个处理器芯片可以使用其产生的同步心跳信号来向系统中的每个其他处理器芯片提供源请求信息。 源请求信息标识由发起心跳信号的处理器芯片发送的活动源请求的数量。 来自系统中的每个处理器芯片的源请求信息可被处理器芯片用于确定用于从源处理器芯片到目的地处理器芯片的数据的最佳路由路径。 结果,当选择哪个处理器芯片来转发数据时,可以考虑在每个可能的路由路径处的每个处理器芯片处理数据的拥塞。

    System for providing a cluster-wide system clock in a multi-tiered full-graph interconnect architecture
    9.
    发明授权
    System for providing a cluster-wide system clock in a multi-tiered full-graph interconnect architecture 有权
    用于在多层全图互连架构中提供集群范围的系统时钟的系统

    公开(公告)号:US07827428B2

    公开(公告)日:2010-11-02

    申请号:US11848440

    申请日:2007-08-31

    IPC分类号: G06F1/00 G06F1/04 G06F1/12

    摘要: A system for providing a cluster-wide system clock in a multi-tiered full graph (MTFG) interconnect architecture are provided. Heartbeat signals transmitted by each of the processor chips in the computing cluster are synchronized. Internal system clock signals are generated in each of the processor chips based on the synchronized heartbeat signals. As a result, the internal system clock signals of each of the processor chips are synchronized since the heartbeat signals, that are the basis for the internal system clock signals, are synchronized. Mechanisms are provided for performing such synchronization using direct couplings of processor chips within the same processor book, different processor books in the same supernode, and different processor books in different supernodes of the MTFG interconnect architecture.

    摘要翻译: 提供了一种用于在多层全图(MTFG)互连架构中提供集群范围的系统时钟的系统。 计算群集中的每个处理器芯片发送的心跳信号同步。 基于同步的心跳信号,在每个处理器芯片中产生内部系统时钟信号。 结果,每个处理器芯片的内部系统时钟信号被同步,因为作为内部系统时钟信号的基础的心跳信号被同步。 提供了用于使用同一处理器书中的处理器芯片的直接耦合,同一超级节点中的不同处理器书以及MTFG互连体系结构的不同超节点中的不同处理器簿来执行这种同步的机制。

    Method for Providing a Cluster-Wide System Clock in a Multi-Tiered Full-Graph Interconnect Architecture
    10.
    发明申请
    Method for Providing a Cluster-Wide System Clock in a Multi-Tiered Full-Graph Interconnect Architecture 有权
    在多层全图互连架构中提供集群宽系统时钟的方法

    公开(公告)号:US20090070617A1

    公开(公告)日:2009-03-12

    申请号:US11853522

    申请日:2007-09-11

    IPC分类号: G06F1/12

    CPC分类号: G06F1/10 G06F1/12

    摘要: A method for providing a cluster-wide system clock in a multi-tiered full graph (MTFG) interconnect architecture are provided. Heartbeat signals transmitted by each of the processor chips in the computing cluster are synchronized. Internal system clock signals are generated in each of the processor chips based on the synchronized heartbeat signals. As a result, the internal system clock signals of each of the processor chips are synchronized since the heartbeat signals, that are the basis for the internal system clock signals, are synchronized. Mechanisms are provided for performing such synchronization using direct couplings of processor chips within the same processor book, different processor books in the same supernode, and different processor books in different supernodes of the MTFG interconnect architecture.

    摘要翻译: 提供了一种在多层全图(MTFG)互连架构中提供集群范围的系统时钟的方法。 计算群集中的每个处理器芯片发送的心跳信号同步。 基于同步的心跳信号,在每个处理器芯片中产生内部系统时钟信号。 结果,每个处理器芯片的内部系统时钟信号被同步,因为作为内部系统时钟信号的基础的心跳信号被同步。 提供了用于使用同一处理器书中的处理器芯片的直接耦合,同一超级节点中的不同处理器书以及MTFG互连体系结构的不同超节点中的不同处理器簿来执行这种同步的机制。