摘要:
A ballast circuit for operating a lamp provided with a voltage-current converter, the ballast circuit having a differential amplifier provided with a first input terminal for connection to a reference voltage source for generating a reference voltage, a second input terminal for connection of a reference resistor, and an output. A first current generator supplies a first current to the reference resistor. A current amplifier generates a second current and is provided with an input coupled to the output of the differential amplifier. The differential amplifier is provided with a low-pass filter. The current amplifier on the one hand and the current generator and the reference resistor on the other hand exclusively comprise mutually separate components. The ballast circuit is in addition provided with a current control circuit coupled to the current amplifier and to the current generator for influencing the first current dependent upon the second current. As a result, an interference signal present at the second input terminal causes no appreciable interference in the second current.
摘要:
The present invention relates to a method and a circuit arrangement for protecting a connection terminal (CANH, CANL) of a semiconductor device against electrostatic discharge (ESD), wherein first and second common nodes (N1, N2) protected against ESD of respective first and second polarities are provided. Connection terminals are coupled via first diode means (D5, D6) to the first common node and via second diode means (D7, D8) to the second common node. Thus, several terminals or pins can share the same ESD protection device by connecting them to the first and second common nodes. Due to the fact that a diode requires a smaller chip area than a protection diode, the total chip area can be reduced.
摘要:
An amplifier circuit in which a first amplifier (A1) and a second amplifier (A2) are protected against short-circuits by a protection apparatus which includes a first device (M1), a second device (M2), a third device (M3) and a protection device (B). For this purpose the first device and the second device generate four signals (s1, s2, s3, s4) related to an equal number of currents (i1, i2, i3, i4), which currents are related to a first or a second load current in the first amplifier or in the second amplifier. In order to control the protection device (B), the third device generates at least two control signals (r1, r2) related to the signal currents (s1, s2, s3, s4), use being made of the equality of the load currents in the absence of short-circuits.
摘要:
In a network a star node (SN1) interconnects a plurality of stations (ST1–ST3). The star node (SN1) has interfaces (I1–I3), each having a connection terminal (BP) for connecting a selected one of the stations to the star node (SN1) and each interface receives at a connection terminal (BP) a signal from the station associated with that interface and forwards the received signal to the connection terminal (BP) of the other interfaces. The star node (SN1) further has a common terminal (RT1) and each interface has a receiver (CMP1) coupled to the connection terminal (BP) for receiving the signal from the associated station, a transmitter (TR) coupled to the connection terminal (BP), a first activity detector (A1) for generating a first activity signal (AS1) in response to signal transitions at an input (CIP1) of the receiver (CMP1), a second activity detector (A2) for generating a second activity signal (AS2) in response to signal transitions at the common terminal (RT1), a first switch (SW1) for disabling signal transfer from the receiver (CMP1) to the common terminal (RT1) in response to the second activity signal (AS2), and a second switch (SW2) for disabling signal transfer from the common terminal (RT1) to the transmitter (TR) in response to the first activity signal (AS1). The structure of the interface allows easy expansion of the number of interfaces within the star node (SN1) and a data protocol without a preamble.
摘要:
A line driver for driving a two-wire communication bus (8, 9) consisting of a chain of inverters (I1, . . . , I6). Each inverter may consist of a series arrangement of a PMOS (M1) and an NMOS (M2) transistor. The output terminals (1b, 3b, 5b) of the odd-numbered inverters (I1, I3, I5) are connected to the first wire (8) of the bus through respective first resistors (R1, R3, R5) and the output terminals (2b, 4b, 6b) of the even-numbered inverters (I2, I4, I6) are connected to the second wire (9) of the bus through respective second resistors (R2, R4, R6). Owing to the propagation delay of the inverters and the additive effect of the resistors the voltages on the bus wires change only in successive small steps. This results in a small common mode voltage on the bus wires and, consequently, a low electromagnetic emission.
摘要:
Bridge amplifier circuit including a linear amplifier stage (3) which in single-ended configuration drives a load (13). Once the output voltage (U.sub.0) at the output (7) of the amplifier stage (3) has reached the maximum or minimum output swing limit, the voltage on the load terminal (14) remote from the output (7) is either reduced or increased by a switch circuit (15) in response to control signals (36) originating from control means (37) in dependence on the input signal (U.sub.i) and/or the output signal (U.sub.0). The switch circuit (15) includes a bidirectional switch (16) arranged as two controllable diodes (90, T.sub.11) connected in anti-parallel and having very little forward bias. Compensating voltage jumps at the output (7) of the amplifier stage (3), which require a high slew rate, are avoided in this manner.
摘要:
The communication bus system comprises a plurality of node circuits (10a-d) and a relay circuit (12, 14, 16) coupling the node circuits (10a-d). The relay circuit (12, 14, 16) has a transceiver circuit (124, 164) for relaying messages (21) between the node circuits (10a-d) in a normal mode. The transceiver circuit (124, 164) is powered down in a sleep mode. A detector circuit (120, 160) detects an incoming message (41) when the relay circuit (12, 14, 16) is in a sleep mode. A mode control circuit (122, 162) powers up the transceiver (124, 164) in response to detection of an incoming message (21). Steps are taken that ensure, in the normal mode, that messages (21) will not be relayed in unreadable form. The mode control circuit (122, 162) is arranged to cause the transceiver (124, 164) to relay a remainder (25) of the incoming message (21) after power up. In an embodiment the power needed to transmit the remainder (25) of the message (21) is drained from a capacitor (306) in the power supply (30) before the power supply (30) controls the power supply voltage in the normal mode. In another embodiment the detector circuit (120, 160) temporarily controls the direction of operation of the transceivers (124, 164) at the start of the normal mode instead of further detectors (58a-d) that normally control the direction of operation in the normal mode.
摘要:
A method of manufacturing an electronic device, particularly an acceleration sensor, comprising providing a wafer (10) having first and second semiconductor layers (12, 16) with a buried oxide layer (14) therebetween and forming a semiconductor device (such as a detection circuit) on one side of the wafer (10) in the first semiconductor layer (16) and a micro-electromechanical systems (MEMS) device on the opposite side of the wafer (10) in the second semi-conductor layer (12).
摘要:
The servosystem includes adjusting means (1) for changing the position of mechanical element (3), a first transducer (5) for forming an adjusting voltage which is a measure of a desired position of the element, a second transducer (15) for forming a response voltage which is a measure of the actual position of the element, and detection means (13) for forming an error signal (If) which is a measure of a difference between the response voltage and the adjusting voltage. The detection means (13) have a first and a second input (11, 21) which are connected to the first transducer and the second transducer, respectively, and an output (23) which is connected to an input (27) of control means (29) for generating, in dependence on the value of the error signal, a control signal (Vc1, Vc2), for controlling the adjusting means. A compensation resistor (31) is inserted in the connection lead (9) between, for example the first transducer (5) and the input (11) of the detection means (13) connected thereto. The detection means (13) conduct a compensation current through the compensation resistor (31), which compensation current causes a voltage drop across the compensation resistor which is equal to the difference between the response voltage and the adjusting voltage, and form the error signal (If) so that its value is proportional to the value of the compensation current. Consequently, no control signal is applied to the adjusting means (1) if said connection (9) is interrupted.
摘要:
A temperature compensated amplifier circuit includes a control transistor and an output transistor having a control electrode coupled to the main current path of the control transistor. The control electrode of the output transistor is also coupled to a current supply element which is connected in series with the main current path of the control transistor for supplying a bias current whose variation as a result of thermal cooupling between the current supply element and the output transistor is smaller than the variation of the part of the bias current through the main current path of the control transistor as a result of thermal coupling between the control transistor and the output transistor.