Method for optimizing voltage-frequency setup in multi-core processor systems
    4.
    发明授权
    Method for optimizing voltage-frequency setup in multi-core processor systems 有权
    用于优化多核处理器系统中的电压 - 频率设置的方法

    公开(公告)号:US08245070B2

    公开(公告)日:2012-08-14

    申请号:US12317845

    申请日:2008-12-30

    IPC分类号: G06F1/12

    CPC分类号: G06F1/3203 Y02D10/126

    摘要: A method for dynamically operating a multi-core processor system is provided. The method involves ascertaining currently active processor cores, identifying a currently active processor core having a lowest operating frequency, and adjusting at least one operational parameter according to voltage-frequency characteristics corresponding to the identified processor core to fulfill a predefined functional mode, e.g. power optimization mode, performance optimization mode and mixed mode.

    摘要翻译: 提供了一种用于动态操作多核处理器系统的方法。 该方法包括确定当前活动的处理器核心,识别具有最低工作频率的当前活动的处理器核心,以及根据与所识别的处理器核心相对应的电压 - 频率特性来调整至少一个操作参数,以实现预定义的功能模式,例如。 电源优化模式,性能优化模式和混合模式。

    Dynamically managing thermal levels in a processing system
    6.
    发明授权
    Dynamically managing thermal levels in a processing system 有权
    在处理系统中动态管理热水平

    公开(公告)号:US07934110B2

    公开(公告)日:2011-04-26

    申请号:US11861186

    申请日:2007-09-25

    IPC分类号: G06F1/26 G06F1/22

    CPC分类号: G06F1/206 G05D23/1935

    摘要: A technique to dynamically maintain the thermal levels of a plurality of cores of a processing system by interleave core hopping with throttling techniques. The interleaving logic may transfer execution of threads from a hot core to a cold if core hopping is applicable. Core hopping may be applicable if there exist a cold core to which the execution of threads can be assigned to from a hot core and if the rate of occurrence of core hopping is within an allowable rate value. The interleaving logic may apply throttling techniques if core hopping is not applicable. The throttling techniques may throttle the throttling parameters, which may comprise voltage, frequency, and micro-architecture throttling parameters provided to the hot core if the core hopping is not applicable.

    摘要翻译: 通过采用节流技术的交错核心跳跃来动态地维持处理系统的多个核心的热水平的技术。 如果核心跳跃可应用,交错逻辑可以将线程的执行从热核心转移到冷。 如果存在可以从热核心分配线程的执行的冷核心以及核心跳跃的发生速率在可允许的速率值内的情况下,可以应用核心跳频。 如果核心跳频不适用,交错逻辑可以应用节流技术。 节流技术可以节流节流参数,其可以包括提供给热核心的电压,频率和微架构节流参数,如果核心跳频不适用。

    DYNAMICALLY MANAGING THERMAL LEVELS IN A PROCESSING SYSTEM
    7.
    发明申请
    DYNAMICALLY MANAGING THERMAL LEVELS IN A PROCESSING SYSTEM 有权
    在处理系统中动态地管理热水平

    公开(公告)号:US20090083551A1

    公开(公告)日:2009-03-26

    申请号:US11861186

    申请日:2007-09-25

    IPC分类号: G05D23/00 G06F1/00

    CPC分类号: G06F1/206 G05D23/1935

    摘要: A technique to dynamically maintain the thermal levels of a plurality of cores of a processing system by interleave core hopping with throttling techniques. The interleaving logic may transfer execution of threads from a hot core to a cold if core hopping is applicable. Core hopping may be applicable if there exist a cold core to which the execution of threads can be assigned to from a hot core and if the rate of occurrence of core hopping is within an allowable rate value. The interleaving logic may apply throttling techniques if core hopping is not applicable. The throttling techniques may throttle the throttling parameters, which may comprise voltage, frequency, and micro-architecture throttling parameters provided to the hot core if the core hopping is not applicable.

    摘要翻译: 通过采用节流技术的交错核心跳跃来动态地维持处理系统的多个核心的热水平的技术。 如果核心跳跃可应用,交错逻辑可以将线程的执行从热核心转移到冷。 如果存在可以从热核心分配线程的执行的冷核心以及核心跳跃的发生速率在可允许的速率值内的情况下,可以应用核心跳频。 如果核心跳频不适用,交错逻辑可以应用节流技术。 节流技术可以节流节流参数,其可以包括提供给热核心的电压,频率和微架构节流参数,如果核心跳频不适用。

    Deterministic management of dynamic thermal response of processors
    8.
    发明授权
    Deterministic management of dynamic thermal response of processors 有权
    处理器动态热响应的确定性管理

    公开(公告)号:US08707060B2

    公开(公告)日:2014-04-22

    申请号:US12263431

    申请日:2008-10-31

    IPC分类号: G06F1/00

    摘要: Methods and apparatus relating to deterministic management of dynamic thermal response of processors are described. In one embodiment, available thermal headroom may be used to extract the performance potential in a deterministic way, e.g., such that it reduces or even eliminates the product-to-product variations. Other embodiments are also disclosed and claimed.

    摘要翻译: 描述与处理器的动态热响应的确定性管理有关的方法和装置。 在一个实施例中,可用的热余量可用于以确定性方式提取性能潜力,例如使其减少甚至消除产品与产品的变化。 还公开并要求保护其他实施例。

    DETERMINISTIC MANAGEMENT OF DYNAMIC THERMAL RESPONSE OF PROCESSORS
    9.
    发明申请
    DETERMINISTIC MANAGEMENT OF DYNAMIC THERMAL RESPONSE OF PROCESSORS 有权
    处理器动态热响应的确定管理

    公开(公告)号:US20100115293A1

    公开(公告)日:2010-05-06

    申请号:US12263431

    申请日:2008-10-31

    IPC分类号: G06F1/00

    摘要: Methods and apparatus relating to deterministic management of dynamic thermal response of processors are described. In one embodiment, available thermal headroom may be used to extract the performance potential in a deterministic way, e.g., such that it reduces or even eliminates the product-to-product variations. Other embodiments are also disclosed and claimed.

    摘要翻译: 描述与处理器的动态热响应的确定性管理有关的方法和装置。 在一个实施例中,可用的热余量可用于以确定性方式提取性能潜力,例如使其减少甚至消除产品与产品的变化。 还公开并要求保护其他实施例。