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公开(公告)号:US10313139B2
公开(公告)日:2019-06-04
申请号:US15479187
申请日:2017-04-04
IPC分类号: H04L12/437 , H04L12/10 , H04L12/24 , G06F1/26 , H04B3/44 , H04L12/40 , H04L12/403 , H04L12/44
摘要: In one embodiment, a master device has a first port and a second port and initially applies a DC voltage only to the first port. A plurality of slave devices, each have a third port and a fourth port, are serially connected to the master device in a ring, via conductors, starting at the first port and ending at the second port. The conductors simultaneously carry the DC voltage and differential data. Each slave device, after performing a detection routine, then sequentially applies the DC voltage to the adjacent downstream slave device in a first direction around the ring. If the master does not detect the presence of the DC voltage at its second port, the master device applies the DC voltage to both the first port and the second port to sequentially power up the slave devices in both directions around the ring of slave devices.
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公开(公告)号:US09860072B2
公开(公告)日:2018-01-02
申请号:US15134117
申请日:2016-04-20
CPC分类号: H04L12/10 , H04L12/12 , H04L12/403 , Y02D50/40
摘要: A system includes a master and a slave coupled via a wire pair for transmitting differential data. The master and slave are each powered by a local DC power supply. In a normal mode, a DC voltage and differential data are supplied over the same wire pair. The differential data is processed by a PHY AC-coupled to the wire pair. To enter a low power sleep mode, such as due to a temporary non-use of the system, the master interrupts the DC voltage on the wire pair, which signals to the slave to enter the sleep mode. The system is woken up by reapplying the DC voltage to the wire pair to signal to the slave to wake up. Only the DC path, and not the data path, is used for signaling the sleep mode and awake mode, so the data path can be disabled to conserve power.
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公开(公告)号:US20170310491A1
公开(公告)日:2017-10-26
申请号:US15479187
申请日:2017-04-04
IPC分类号: H04L12/10
CPC分类号: H04L12/10 , G06F1/266 , H04B3/44 , H04L12/40045 , H04L12/403 , H04L12/437 , H04L12/44
摘要: In one embodiment, a master device has a first port and a second port and initially applies a DC voltage only to the first port. A plurality of slave devices, each have a third port and a fourth port, are serially connected to the master device in a ring, via conductors, starting at the first port and ending at the second port. The conductors simultaneously carry the DC voltage and differential data. Each slave device, after performing a detection routine, then sequentially applies the DC voltage to the adjacent downstream slave device in a first direction around the ring. If the master does not detect the presence of the DC voltage at its second port, the master device applies the DC voltage to both the first port and the second port to sequentially power up the slave devices in both directions around the ring of slave devices.
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公开(公告)号:US20160337138A1
公开(公告)日:2016-11-17
申请号:US15134117
申请日:2016-04-20
IPC分类号: H04L12/10
CPC分类号: H04L12/10 , H04L12/12 , H04L12/403 , Y02D50/40
摘要: A system includes a master and a slave coupled via a wire pair for transmitting differential data. The master and slave are each powered by a local DC power supply. In a normal mode, a DC voltage and differential data are supplied over the same wire pair. The differential data is processed by a PHY AC-coupled to the wire pair. To enter a low power sleep mode, such as due to a temporary non-use of the system, the master interrupts the DC voltage on the wire pair, which signals to the slave to enter the sleep mode. The system is woken up by reapplying the DC voltage to the wire pair to signal to the slave to wake up. Only the DC path, and not the data path, is used for signaling the sleep mode and awake mode, so the data path can be disabled to conserve power.
摘要翻译: 系统包括通过线对耦合的主机和从机,用于发送差分数据。 主机和从机都由本地直流电源供电。 在正常模式下,通过相同的线对提供直流电压和差分数据。 差分数据由耦合到线对的PHY处理。 要进入低功耗睡眠模式,例如由于暂时不使用系统,主机会中断线对上的直流电压,从而将信号通知从机进入睡眠模式。 通过将直流电压重新应用到线对来唤醒系统,以向从机发信号进行唤醒。 只有DC路径,而不是数据路径用于信令睡眠模式和唤醒模式,因此可以禁用数据路径以节省功耗。
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