公开(公告)号：US09000747B2

公开(公告)日：2015-04-07

申请号：US13829652

申请日：2013-03-14

Applicant: Linear Technology Corporation

Inventor： Thomas Lloyd Botker

IPC: H02M3/158 ,  H03F1/00

CPC classification number: H03F1/00 ,  H03F1/0261 ,  H03F3/45192 ,  H03F2200/513

Abstract: An amplifier circuit has a voltage input terminal, for receiving Vin, and a voltage output terminal, for outputting Vout. A feedback circuit controls Vout to match Vin. A differential input stage receives Vin and Vout and generates a first output signal. An output stage comprises a pull down circuit for Vout. A main MOSFET is controlled by the first output signal to pull down Vout to match Vin when Vout is above a threshold voltage Vtrans. An auxiliary MOSFET, in parallel with the main MOSFET, is controlled by the first output signal to pull down Vout to match Vin when Vout is below Vtrans. The main MOSFET is turned substantially off when Vout is below Vtrans. A headroom generator coupled between the Vout terminal and a drain of the auxiliary MOSFET allows the auxiliary MOSFET to operate in its active region and pull Vout to ground.

Abstract translation: 放大器电路具有用于接收Vin的电压输入端子和用于输出Vout的电压输出端子。 反馈电路控制Vout以匹配Vin。 差分输入级接收Vi​​n和Vout并产生第一输出信号。 输出级包括用于Vout的下拉电路。 当Vout高于阈值电压Vtrans时，主MOSFET由第一输出信号控制以下拉Vout以匹配Vin。 与主MOSFET并联的辅助MOSFET由第一输出信号控制，以在Vout低于Vtrans时下拉Vout以匹配Vin。 当Vout低于Vtrans时，主MOSFET关闭。 耦合在Vout端子和辅助MOSFET的漏极之间的裕量发生器允许辅助MOSFET在其有源区域中工作并将Vout拉到地。

公开(公告)号：US20140266840A1

公开(公告)日：2014-09-18

申请号：US13829517

申请日：2013-03-14

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Thomas Lloyd Botker

IPC: H03M1/12 ,  H03F3/45

CPC classification number: H03F1/14 ,  H03F3/45085 ,  H03F3/45475 ,  H03F2200/45 ,  H03M1/124

Abstract: A driver for an analog-to-digital converter (ADC) has an overall feedback loop between its input and its output for maintaining overall accuracy, and a much faster feedback loop in its output stage that quickly compensates for output transients before the overall feedback loop can substantially react to the transients. Output voltage transients are created by the intermittent capacitive load of the ADC. The fast feedback loop can be made very fast since there are only a few components in the fast feedback path. The fast reduction of the output transients enables a shorter sampling time, leading to more accurate analog-to-digital conversion. The overall gain of the driver can be set to be greater than unity while still providing good output transient suppression.

Abstract translation: 用于模数转换器（ADC）的驱动器在其输入和其输出之间具有总体反馈回路，用于保持总体精度，并且其输出级中的反馈回路快得多，可在整个反馈回路之前快速补偿输出瞬变 可以基本上对瞬态反应。 输出电压瞬变由ADC的间歇性容性负载产生。 由于在快速反馈路径中只有少数几个组件，所以快速反馈环路可以非常快地进行。 输出瞬变的快速降低可以缩短采样时间，从而实现更精确的模数转换。 驱动器的总体增益可以设置为大于单位，同时仍然提供良好的输出瞬态抑制。

公开(公告)号：US08866554B2

公开(公告)日：2014-10-21

申请号：US13829807

申请日：2013-03-14

Applicant: Linear Technology Corporation

Inventor： Thomas Lloyd Botker

IPC: H03F3/45

CPC classification number: H03F1/0266 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/447 ,  H03F2203/45248 ,  H03F2203/45466 ,  H03F2203/45512 ,  H03F2203/45702

Abstract: A method of improving the slew rate of an amplifier is described where a differential pair of transistors receives a differential first control signal and second control signal. The tail current for the transistors is provided by a tail current regulator. The same control signals are applied to a slew boost controller, whose output increases as the differential between the control signals increase. The tail current regulator generates a bias signal that sets a minimum tail current. The tail current is controlled to be the minimum tail current until the slew boost output signal exceeds a threshold, whereupon the tail current increases in response to an increasing differential between the control signals. Common mode rejection is not adversely affected by the slew boost controller generating a slightly varying current under common mode conditions due to the minimum tail current.

Abstract translation: 描述了一种提高放大器的转换速率的方法，其中差分对晶体管接收差分第一控制信号和第二控制信号。 晶体管的尾电流由尾电流调节器提供。 相同的控制信号被施加到压摆升压控制器，其输出随着控制信号之间的差异增加而增加。 尾电流调节器产生设置最小尾电流的偏置信号。 尾电流被控制为最小尾电流，直到转换升压输出信号超过阈值为止，因此尾电流响应于控制信号之间的差增加而增加。 由于最小的尾电流，共模抑制不会在共模状态下产生略微变化的电流的压摆升压控制器产生不利影响。

公开(公告)号：US08742848B1

公开(公告)日：2014-06-03

申请号：US13829567

申请日：2013-03-14

Applicant: Linear Technology Corporation

Inventor： Thomas Lloyd Botker

IPC: H03F3/45

CPC classification number: H03F3/4508 ,  H03F3/45618 ,  H03F2200/261 ,  H03F2203/45356

Abstract: A method of fabricating an instrumentation amplifier to have an improved common mode rejection ratio (CMRR) vs. frequency initially trims resistors in the input amplifiers of the instrumentation amplifier during a DC test, where the inputs are shorted and a DC voltage is applied, so that the output of the amplifier is approximately zero. This will normally cause the transconductances of the two input amplifiers to be different. Thus, the AC CMRR will degrade with frequency. Trimmable capacitors are provided in the input section and are trimmed during a common mode AC test to cause the output voltage to be minimized during the AC test. This causes the two input amplifiers to have the same bandwidth and gm/C ratio.

Abstract translation: 在直流测试期间，在输入短路和施加直流电压的情况下，制造具有改进的共模抑制比（CMRR）与频率的仪器放大器的方法最初对仪表放大器的输入放大器中的电阻器进行微调，因此 放大器的输出大约为零。 这通常会导致两个输入放大器的跨导不同。 因此，AC CMRR将随着频率而降级。 在输入部分提供了可调电容器，并在共模交流测试期间进行了修整，以在AC测试期间使输出电压最小化。 这使得两个输入放大器具有相同的带宽和gm / C比。

公开(公告)号：US08866553B2

公开(公告)日：2014-10-21

申请号：US13829517

申请日：2013-03-14

Applicant: Linear Technology Corporation

Inventor： Thomas Lloyd Botker

IPC: H03F3/45

CPC classification number: H03F1/14 ,  H03F3/45085 ,  H03F3/45475 ,  H03F2200/45 ,  H03M1/124

Abstract: A driver for an analog-to-digital converter (ADC) has an overall feedback loop between its input and its output for maintaining overall accuracy, and a much faster feedback loop in its output stage that quickly compensates for output transients before the overall feedback loop can substantially react to the transients. Output voltage transients are created by the intermittent capacitive load of the ADC. The fast feedback loop can be made very fast since there are only a few components in the fast feedback path. The fast reduction of the output transients enables a shorter sampling time, leading to more accurate analog-to-digital conversion. The overall gain of the driver can be set to be greater than unity while still providing good output transient suppression.

Abstract translation: 用于模数转换器（ADC）的驱动器在其输入和其输出之间具有总体反馈回路，用于保持总体精度，并且其输出级中的反馈回路快得多，可在整个反馈回路之前快速补偿输出瞬变 可以基本上对瞬态反应。 输出电压瞬变由ADC的间歇性容性负载产生。 由于在快速反馈路径中只有少数几个组件，所以快速反馈环路可以非常快地进行。 输出瞬变的快速降低可以缩短采样时间，从而实现更精确的模数转换。 驱动器的总体增益可以设置为大于单位，同时仍然提供良好的输出瞬态抑制。

公开(公告)号：US20140266435A1

公开(公告)日：2014-09-18

申请号：US13829807

申请日：2013-03-14

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Thomas Lloyd Botker

IPC: H03F3/45

CPC classification number: H03F1/0266 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/447 ,  H03F2203/45248 ,  H03F2203/45466 ,  H03F2203/45512 ,  H03F2203/45702

Abstract: A method of improving the slew rate of an amplifier is described where a differential pair of transistors receives a differential first control signal and second control signal. The tail current for the transistors is provided by a tail current regulator. The same control signals are applied to a slew boost controller, whose output increases as the differential between the control signals increase. The tail current regulator generates a bias signal that sets a minimum tail current. The tail current is controlled to be the minimum tail current until the slew boost output signal exceeds a threshold, whereupon the tail current increases in response to an increasing differential between the control signals. Common mode rejection is not adversely affected by the slew boost controller generating a slightly varying current under common mode conditions due to the minimum tail current.

Abstract translation: 描述了一种提高放大器的转换速率的方法，其中差分对晶体管接收差分第一控制信号和第二控制信号。 晶体管的尾电流由尾电流调节器提供。 相同的控制信号被施加到压摆升压控制器，其输出随着控制信号之间的差异增加而增加。 尾电流调节器产生设置最小尾电流的偏置信号。 尾电流被控制为最小尾电流，直到转换升压输出信号超过阈值为止，因此尾电流响应于控制信号之间的差增加而增加。 由于最小的尾电流，共模抑制不会在共模状态下产生略微变化的电流的压摆升压控制器产生不利影响。

公开(公告)号：US20140266393A1

公开(公告)日：2014-09-18

申请号：US13829598

申请日：2013-03-14

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Thomas Lloyd Botker

IPC: H01L29/73 ,  H03K17/16

CPC classification number: H01L29/73 ,  H01L29/402 ,  H01L29/735 ,  H03K17/16

Abstract: In a bipolar transistor, a thin gate oxide, preferably less than 600 Å, is formed over the base surface region between the emitter and collector. A conductive gate, such as doped polysilicon, is then formed over the gate oxide and biased at the emitter voltage. In the example of a PNP transistor, when the emitter is forward biased with respect to the base to turn the transistor on, the gate is at a positive potential relative to the base. This causes the holes in the base conducting the emitter-collector current to be repelled away from the surface, and the electrons in the base to be attracted to the surface, so that more of the emitter-collector current flows deeper into the base. Thus, the effect of defects at the base surface is mitigated, and 1/f noise is reduced. The invention is equally applicable to PNP and NPN transistors. Other benefits result.

Abstract translation: 在双极晶体管中，在发射极和集电极之间的基表面区域上形成优选小于600埃的薄栅极氧化物。 导电栅极，例如掺杂多晶硅，然后形成在栅极氧化物上，并以发射极电压偏置。 在PNP晶体管的示例中，当发射极相对于基极正向偏置以使晶体管导通时，栅极相对于基极处于正电位。 这导致导电发射极 - 集电极电流的基极中的孔被排斥离开表面，并且基底中的电子被吸引到表面，使得更多的发射极 - 集电极电流更深地流入基极。 因此，减轻了基面缺陷的影响，降低了1 / f噪声。 本发明同样适用于PNP和NPN晶体管。 其他好处的结果。

公开(公告)号：US20140266108A1

公开(公告)日：2014-09-18

申请号：US13829652

申请日：2013-03-14

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Thomas Lloyd Botker

IPC: H02M3/158

CPC classification number: H03F1/00 ,  H03F1/0261 ,  H03F3/45192 ,  H03F2200/513

Abstract: An amplifier circuit has a voltage input terminal, for receiving Vin, and a voltage output terminal, for outputting Vout. A feedback circuit controls Vout to match Vin. A differential input stage receives Vin and Vout and generates a first output signal. An output stage comprises a pull down circuit for Vout. A main MOSFET is controlled by the first output signal to pull down Vout to match Vin when Vout is above a threshold voltage Vtrans. An auxiliary MOSFET, in parallel with the main MOSFET, is controlled by the first output signal to pull down Vout to match Vin when Vout is below Vtrans. The main MOSFET is turned substantially off when Vout is below Vtrans. A headroom generator coupled between the Vout terminal and a drain of the auxiliary MOSFET allows the auxiliary MOSFET to operate in its active region and pull Vout to ground.

Abstract translation: 放大器电路具有用于接收Vin的电压输入端子和用于输出Vout的电压输出端子。 反馈电路控制Vout以匹配Vin。 差分输入级接收Vi​​n和Vout并产生第一输出信号。 输出级包括用于Vout的下拉电路。 当Vout高于阈值电压Vtrans时，主MOSFET由第一输出信号控制以下拉Vout以匹配Vin。 与主MOSFET并联的辅助MOSFET由第一输出信号控制，以在Vout低于Vtrans时下拉Vout以匹配Vin。 当Vout低于Vtrans时，主MOSFET关闭。 耦合在Vout端子和辅助MOSFET的漏极之间的裕量发生器允许辅助MOSFET在其有源区域中工作并将Vout拉到地。