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    Method and apparatus capable of producing FM halftone dots in high speed
    4.
    发明授权
    Method and apparatus capable of producing FM halftone dots in high speed 有权
    能够高速生产FM半色调点的方法和装置

    公开(公告)号：US08363278B2

    公开(公告)日：2013-01-29

    申请号：US11918077

    申请日：2006-03-31

    申请人： Zhihong Liu ,  Feng Chen ,  Bin Yang

    发明人： Zhihong Liu ,  Feng Chen ,  Bin Yang

    IPC分类号： G06K15/00 ,  G06K9/00 ,  G03G13/04

    CPC分类号： H04N1/4052

    摘要： The present invention relates to a method and apparatus capable of generating frequency-modulation halftone dots in high speed and belongs to the field of the digital image halftone. In the prior art, read-write operation is usually carried out many times in error rows during processing each pixel so that halftone dots are generated in low speed. In the method according to the present invention, the error generated by the current pixel is buffered in a register file and the final accumulated error values are written in the error rows only after all of the relative pixels are processed. Thus, read-write operation is carried out only once in the error rows for processing each pixel. The present invention also provides an apparatus to implement the method. The apparatus comprises an error row memory, an error buffer register file, a gray generation circuit, a threshold comparison circuit, an error generation circuit, an error buffer register file control circuit, and an error row control circuit. The method and apparatus according to the present invention decrease the steps in operation and improve the speed for generating the frequency-modulation halftone dots.

    摘要翻译： 本发明涉及能够高速产生调频半色调点的属于数字图像半色调的领域的方法和装置。 在现有技术中，在处理每个像素期间，读写操作通常在错误行中进行多次，使得半色调点以低速生成。 在根据本发明的方法中，由当前像素产生的误差被缓存在寄存器文件中，并且只有在处理了所有相对像素之后才将最终的累积误差值写入误差行。 因此，在用于处理每个像素的错误行中仅执行一次读写操作。 本发明还提供了一种实现该方法的装置。 该装置包括错误行存储器，错误缓冲寄存器文件，灰色生成电路，阈值比较电路，错误产生电路，错误缓冲寄存器文件控制电路和错误行控制电路。 根据本发明的方法和装置降低了操作步骤，提高了生成调频半色调点的速度。

    FLUIDIZED BED DEVICE
    5.
    发明申请
    FLUIDIZED BED DEVICE 审中-公开
    流化床装置

    公开(公告)号：US20110200489A1

    公开(公告)日：2011-08-18

    申请号：US13122991

    申请日：2009-10-26

    申请人： Zhihong Liu ,  Toshiyuki Suda

    发明人： Zhihong Liu ,  Toshiyuki Suda

    IPC分类号： B01J8/18

    CPC分类号： F27B15/00 ,  B01J2/16 ,  F27B15/08 ,  F27B15/09 ,  F27B15/10 ,  F27B15/18

    摘要： In a fluidized bed device 3 with a fluidized bed 2 of a bed material provided in a fluidized bed vessel 1 by a gas, the fluidized bed vessel 1 has a charge nozzle 4 connected to an upstream end of the vessel 1 in a direction of flow of the bed material; a charge port 4a of the charge nozzle 4 has a width equal to a width of the fluidized bed 2. The fluidized bed vessel 1 has a discharge nozzle 5 connected to a downstream end of the vessel 1 in the direction of flow of the bed material; a discharge port 5a of the discharge nozzle 5 has a width equal to the width of the fluidized bed 2.

    摘要翻译： 在具有通过气体设置在流化床容器1中的床材料流化床2的流化床装置3中，流化床容器1具有在流动方向上连接到容器1的上游端的充气喷嘴4 的床料; 充电嘴4的充电端口4a的宽度等于流化床2的宽度。流化床容器1具有排放喷嘴5，其沿着床材料的流动方向连接到容器1的下游端 ; 排出喷嘴5的排出口5a的宽度等于流化床2的宽度。

    METHODS AND DEVICES FOR GENERATING DOTS OF AN IMAGE BY USING TWO ERROR ROW MEMORIES
    7.
    发明申请
    METHODS AND DEVICES FOR GENERATING DOTS OF AN IMAGE BY USING TWO ERROR ROW MEMORIES 有权
    通过使用两个错误记忆片段生成图像的方法和设备

    公开(公告)号：US20100115356A1

    公开(公告)日：2010-05-06

    申请号：US12513975

    申请日：2007-11-05

    申请人： Feng Chen ,  Wei Zhu ,  Zhihong Liu

    发明人： Feng Chen ,  Wei Zhu ,  Zhihong Liu

    IPC分类号： G06F12/00 ,  G06F11/07

    CPC分类号： H04N1/4052

    摘要： Disclosed are devices and methods for generating dots of an image by using two error row memories, which are capable of reading and writing data synchronously. A device disclosed comprises: a buffer memory A; a buffer memory B; and a memory controller. The memory controller may comprise a read-write control circuit for the buffer memory A, a read-write control circuit for the buffer memory B, and a buffer memory selection circuit. The buffer memory selection circuit is used to generate a read-write selection signal for the buffer memory A and the buffer memory B. The read-write control circuit for the buffer memory A is connected to the buffer memory A and used to implement a read operation or a write operation on the buffer memory A according to the read-write selection signal. The read-write control circuit for the buffer memory B is connected to the buffer memory B and used to implement a read operation or a write operation on the buffer memory B according to the read-write selection signal. The devices and methods are capable of implementing read and write operations on memories synchronously, which can improve the speed of error diffusion during use.

    摘要翻译： 公开了通过使用能够同步读取和写入数据的两个误差行存储器来生成图像点的装置和方法。 公开的装置包括：缓冲存储器A; 缓冲存储器B; 和一个内存控制器。 存储器控制器可以包括用于缓冲存储器A的读写控制电路，缓冲存储器B的读写控制电路和缓冲存储器选择电路。 缓冲存储器选择电路用于产生用于缓冲存储器A和缓冲存储器B的读写选择信号。缓冲存储器A的读写控制电路连接到缓冲存储器A，用于实现读 根据读写选择信号对缓冲存储器A进行操作或写操作。 用于缓冲存储器B的读写控制电路连接到缓冲存储器B，用于根据读写选择信号对缓冲存储器B执行读操作或写操作。 这些装置和方法能够同步地对存储器执行读和写操作，这可以提高使用期间误差扩​​散的速度。

    METHOD AND SYSTEM FOR MODELING DYNAMIC BEHAVIOR OF A TRANSISTOR
    8.
    发明申请
    METHOD AND SYSTEM FOR MODELING DYNAMIC BEHAVIOR OF A TRANSISTOR 有权
    用于建模晶体管动态特性的方法和系统

    公开(公告)号：US20090119085A1

    公开(公告)日：2009-05-07

    申请号：US11935969

    申请日：2007-11-06

    申请人： Yutao Ma ,  Min-Chie Jeng ,  Bruce W. McGaughy ,  Lifeng Wu ,  Zhihong Liu

    发明人： Yutao Ma ,  Min-Chie Jeng ,  Bruce W. McGaughy ,  Lifeng Wu ,  Zhihong Liu

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036

    摘要： Method and system are disclosed for modeling dynamic behavior of a transistor. The method includes representing static behavior of a transistor using a lookup table, selecting an instance of the transistor from the lookup table for modeling dynamic behavior of the transistor, computing a previous state of the instance using a non-quasi static analytical model, computing a variation in channel charge of the instance according to a rate of change in time, computing a current state of the instance using the previous state and the variation in channel charge, computing a modified terminal voltage that includes a dynamic voltage across a parasitic resistance at the terminal of the transistor according to the current state and previous state of the instance, and storing the modified terminal voltage in a memory device for modeling dynamic behavior of the transistor at the current state.

    摘要翻译： 公开了用于建模晶体管的动态行为的方法和系统。 该方法包括使用查找表来表示晶体管的静态特性，从查找表中选择晶体管的实例以建模晶体管的动态行为，使用非准静态分析模型计算实例的先前状态，计算 根据时间变化率计算实例的信道电荷的变化，使用先前状态计算实例的当前状态和信道电荷的变化，计算修改的终端电压，该电压包括两端的寄生电阻两端的动态电压 根据当前状态和实例的先前状态，晶体管的端子，并将修改的端子电压存储在用于对当前状态下的晶体管的动态行为进行建模的存储器件中。

    Printing Control Method Capable of Reducing Printing Memory Requirement
    9.
    发明申请
    Printing Control Method Capable of Reducing Printing Memory Requirement 有权
    能够减少打印记忆要求的打印控制方法

    公开(公告)号：US20090080024A1

    公开(公告)日：2009-03-26

    申请号：US11813384

    申请日：2005-12-23

    申请人： Zhihong Liu ,  Zhaoxiang Lin

    发明人： Zhihong Liu ,  Zhaoxiang Lin

    IPC分类号： G06K15/00

    CPC分类号： G06K15/02 ,  G06F3/1204 ,  G06F3/1217 ,  G06F3/122 ,  G06F3/1245 ,  G06K15/1825 ,  G06K15/1851 ,  G06K15/1856 ,  G06K15/1863

    摘要： The present invention belongs to the field of printing control technology, and is especially one kind of printing control method with reducing printing memory requirement. The available printing technology always needs complicated segment forming gratings in advance and occupying great amount of memory. The printing control method of the present invention includes interpreting the page data as banded intermediate format data, calculating the time for forming grating of each band of the intermediate format data, pre-analyzing the bands with time for forming grating greater than the printing time, and arranging the job of forming grating of the complicated bands in the idle print time as far as possible. The said method can reduce the band number of forming gratings in advance and reduce the printing memory requirement.

    摘要翻译： 本发明属于打印控制技术领域，特别是一种降低打印存储要求的打印控制方法。 可用的打印技术提前需要复杂的片段形成光栅，占用大量的内存。 本发明的打印控制方法包括将页面数据解释为带状中间格式数据，计算形成中间格式数据的每个频带的光栅的时间，对于形成光栅的时间预先分析大于打印时间的频带， 并且尽可能地在空闲打印时间内布置形成复杂频带的光栅的工作。 所述方法可以预先减少成形光栅的带数，并减少打印存储器的需求。

    Repetitive circuit simulation
    10.
    发明授权
    Repetitive circuit simulation 有权
    重复电路仿真

    公开(公告)号：US09348957B1

    公开(公告)日：2016-05-24

    申请号：US13250541

    申请日：2011-09-30

    申请人： Zhihong Liu ,  Bruce W. McGaughy

    发明人： Zhihong Liu ,  Bruce W. McGaughy

    IPC分类号： G06F17/50 ,  G01R31/3185

    CPC分类号： G06F17/5036 ,  G01R31/318583

    摘要： Method and system are disclosed for repetitive circuit simulation. In one embodiment, a computer implemented method for performing multiple simulations of a circuit includes providing descriptions of connectivity, instants, signal activities, and statistical parameters of the circuit, parsing the circuit in accordance with the descriptions of connectivity, instants, signal activities, and statistical parameters of the circuit to form one or more circuit partitions, performing a first pass simulation of the one or more circuit partitions in accordance with a set of stimuli to generate a history of the first pass simulation, and performing subsequent simulation of the one or more circuit partitions using the history of the first pass simulation.

    摘要翻译： 公开了重复电路仿真的方法和系统。 在一个实施例中，用于执行电路的多次模拟的计算机实现的方法包括提供电路的连接性，时刻，信号活动和统计参数的描述，根据连接性，时刻，信号活动和 用于形成一个或多个电路分区的电路的统计参数，根据一组刺激来执行一个或多个电路分区的第一遍仿真以产生第一遍仿真的历史，以及执行下一个仿真 更多的电路分区使用第一遍仿真的历史。