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公开(公告)号：US20240428822A1
公开(公告)日：2024-12-26
申请号：US18341086
申请日：2023-06-26
Applicant: Macronix International Co., Ltd.
Inventor： Shang-Chi Yang , Chun-Hao Tsai , Tung-Yu Li
Abstract: Electronic circuits, memory devices, and methods for compensating for data distortion from channel loss are provided. In one aspect, an electronic circuit includes a converter circuit configured to convert an input signal to a digital signal and a compensation circuit coupled to the converter circuit. The converter circuit includes a sampling circuit configured to receive the digital signal and generate an output signal. The output signal includes a stream of bits to be transmitted at a plurality of consecutive clock cycles. The converter circuit also includes one or more equalizing circuits coupled to the sampling circuit. Each equalizing circuit is configured to receive a bit of an output feedback signal at one of the consecutive clock cycles. The sampling circuit is configured to generate the output signal based on the digital signal and a sum of one or more equalization outputs of the one or more equalizing circuits.
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公开(公告)号：US12160204B2
公开(公告)日：2024-12-03
申请号：US17384285
申请日：2021-07-23
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Shang-Chi Yang , Jhen-Sheng Chih
Abstract: A receiver circuit has a first stage circuit having a first stage input and a first stage output, the first stage output setting a first stage common mode voltage; a second stage circuit having a second stage input connected to the first stage output, and a second stage output setting a second stage common mode voltage; and a buffer circuit having a trip point voltage, connected to the second stage output. The first stage circuit can include circuit elements configured to establish the first stage common mode voltage so that the second stage common mode voltage matches the trip point voltage. The second stage circuit can include a self-biased amplifier.
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公开(公告)号：US12094554B2
公开(公告)日：2024-09-17
申请号：US17960149
申请日：2022-10-05
Applicant: MACRONIX International Co., Ltd.
Inventor： Chung-Han Wu , Che-Wei Liang , Chih-He Chiang , Shang-Chi Yang
Abstract: A memory device, a failure bits detector, and a failure bits detection method thereof are provided. The failure bits detector includes a current generator, a current mirror, and a comparator. The current generator generates a first current according to a reference code. The current mirror mirrors the first current to generate a second current at a second end of the current mirror. The comparator compares a first voltage at a first input end with a second voltage at a second input end to generate a detection result.
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公开(公告)号：US20230037585A1
公开(公告)日：2023-02-09
申请号：US17674132
申请日：2022-02-17
Applicant: Macronix International Co., Ltd.
Inventor： Shang-Chi Yang , Hui-Yao Kao
Abstract: Systems, methods, circuits, and apparatus including computer-readable mediums for managing page buffer circuits in memory devices are provided. In one aspect, a memory device includes a memory cell array, memory cell lines connecting respective lines of memory cells, and a page buffer circuit including page buffers coupled to the memory cell lines. Each page buffer includes a sensing latch circuit and a storage latch circuit. The sensing latch circuit includes a sensing transistor coupled to a sensing node and at least one sensing latch unit having a first node coupled to the sensing node and a second node coupled to a first terminal of the sensing transistor. The storage latch circuit includes at least one storage latch unit having third and fourth nodes coupled to the sensing node and a gate terminal of the sensing transistor. A second terminal of the sensing transistor is coupled to a ground.
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公开(公告)号：US10860043B2
公开(公告)日：2020-12-08
申请号：US15658286
申请日：2017-07-24
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Chun-Hsiung Hung , Shang-Chi Yang
Abstract: A circuit and a method for supplying a regulated voltage to a target circuit characterized by fast changes in current loading are described. A voltage regulator supplies the regulated voltage to an output node. The voltage regulator has a transistor having a gate, a first terminal connected to a power supply terminal, and a second terminal connected to the output node of the voltage regulator. A voltage transition generator is capacitively coupled to the gate of the transistor to increase or decrease its driving power upon occurrence of an event in the target circuit indicating a change in current loading. The change in current loading can have an expected magnitude, and the voltage transition can have a magnitude that is a function of an expected magnitude of the increase or decrease in current loading.
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Patent Agency Ranking
公开(公告)号：US09419596B2
公开(公告)日：2016-08-16
申请号：US14479104
申请日：2014-09-05
Applicant: Macronix International Co., Ltd.
Inventor： Shang-Chi Yang , Su-Chueh Lo
IPC: G05F1/10 , H03K5/02 , H01L27/06 , H01L21/8234
CPC classification number: H03K5/023 , G11C7/062 , G11C7/12 , G11C2207/002 , H01L21/8234 , H01L27/0617
Abstract: One aspect of the technology is an integrated circuit, comprising a bias circuit and a sense amplifier. The bias circuit has a diode-connected transistor and a first bias voltage. The first bias voltage is represented by a first term inversely dependent on a first mobility of charge carriers of the diode-connected transistor and inversely dependent on a first gate-to-channel dielectric capacitance of the diode-connected transistor. The sense amplifier is coupled to another transistor that has a gate coupled to the first bias voltage of the bias circuit.
Abstract translation: 该技术的一个方面是集成电路，包括偏置电路和读出放大器。 偏置电路具有二极管连接的晶体管和第一偏置电压。 第一偏置电压由与二极管连接的晶体管的电荷载流子的第一迁移率成反比的第一项表示，并且取决于二极管连接晶体管的第一栅极 - 沟道介电电容。 读出放大器耦合到具有与偏置电路的第一偏置电压耦合的栅极的另一个晶体管。
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公开(公告)号：US09395729B1
公开(公告)日：2016-07-19
申请号：US14722192
申请日：2015-05-27
Applicant: Macronix International Co., Ltd.
Inventor： Shang-Chi Yang , Yi-Huang Liu
Abstract: A low dropout regulator includes a pre-regulation circuit, a sustaining circuit coupled to the pre-regulation circuit, and a pass element coupled to the sustaining circuit. The pre-regulation circuit is configured to generate a bias voltage. The sustaining circuit is configured to receive the bias voltage and an enable signal, and generate a control signal. The sustaining circuit is turned on or off by the enable signal. The pass element is configured to receive the control signal. When the enable signal turns on the sustaining circuit, the sustaining circuit generates the control signal according to the bias voltage so that a voltage value of the control signal is higher than a voltage threshold of the pass element. When the enable signal turns off the sustaining circuit, the sustaining circuit maintains the voltage value of the control signal above the voltage threshold of the pass element.
Abstract translation: 低压降稳压器包括预调节电路，耦合到预调节电路的维持电路和耦合到维持电路的通过元件。 预调节电路被配置为产生偏置电压。 维持电路被配置为接收偏置电压和使能信号，并产生控制信号。 维持电路由使能信号导通或关断。 传递元件被配置为接收控制信号。 当使能信号接通维持电路时，维持电路根据偏置电压产生控制信号，使得控制信号的电压值高于通过元件的电压阈值。 当使能信号关断维持电路时，维持电路将控制信号的电压值保持在通过元件的电压阈值之上。
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公开(公告)号：US20230326493A1
公开(公告)日：2023-10-12
申请号：US17717657
申请日：2022-04-11
Applicant: Macronix International Co., Ltd.
Inventor： Shang-Chi Yang , Hui-Yao Kao
Abstract: Systems, methods, circuits, and apparatuses for managing integrated circuits in memory devices are provided. In one aspect of this disclosure, an integrated circuit includes: a latch circuit including a latch and a sensing transistor coupled to the latch, and a compensation circuit coupled to the sensing transistor. The sensing transistor includes a gate terminal coupled to a sensing node and an additional terminal coupled to the compensation circuit, and the compensation circuit is configured to apply a control voltage to the additional terminal to compensate for a variation of a threshold voltage of the sensing transistor.
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公开(公告)号：US11656646B2
公开(公告)日：2023-05-23
申请号：US17135131
申请日：2020-12-28
Applicant: Macronix International Co., Ltd.
Inventor： Shang-Chi Yang , Jian-Syu Lin
Abstract: Systems, methods, circuits, devices, and apparatus including computer-readable mediums for managing reference voltages, e.g., with current compensation, in memory systems, e.g., non-volatile memory systems. In one aspect, an integrated circuit includes: an operational amplifier configured to receive input voltages and a supply voltage and output a control voltage based on the input voltages and the supply voltage; an output circuitry configured to receive the control voltage from the operational amplifier and the supply voltage, provide the input voltages to the operational amplifier, and output a reference voltage; and a compensation circuitry coupled to the output circuitry and configured to output a compensation current to compensate the output circuitry such that the reference voltage is substantially constant. The output circuitry is configured to generate the reference voltage based on the control voltage and the compensation current.
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公开(公告)号：US20230033935A1
公开(公告)日：2023-02-02
申请号：US17390707
申请日：2021-07-30
Applicant: MACRONIX International Co., Ltd.
Inventor： Yen-Ning Chiang , Shang-Chi Yang
Abstract: A sense amplifying device includes a bit line bias voltage adjuster and a sense amplifying circuit. The bit line bias voltage adjuster receives a power voltage to be an operation voltage. The bit line bias voltage adjuster includes a first amplifier, a first transistor and a first current source. The first amplifier, based on the power voltage, generates an adjusted reference bit line voltage according to a reference bit line voltage and a feedback voltage. The first transistor receives the adjusted reference bit line voltage and generates the feedback voltage, wherein the first transistor is a native transistor. The sense amplifying circuit receives the power voltage to be the operation voltage, and generates a sensing result according to the adjusted reference bit line voltage.
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