公开(公告)号：US11704246B2

公开(公告)日：2023-07-18

申请号：US17539257

申请日：2021-12-01

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Bo-Rong Lin ,  Ming-Liang Wei ,  Hsiang-Pang Li ,  Nai-Jia Dong ,  Hsiang-Yun Cheng ,  Chia-Lin Yang

IPC: G06F12/0804

CPC classification number: G06F12/0804 ,  G06F2212/601

Abstract: A memory system for maintaining data consistency and an operation method thereof are provided. The operation method includes: receiving a first data in a first cache of a first memory from a processor; reading the first data from the first cache and writing the first data as a redo log into a log buffer of the first memory; writing the redo log from the log buffer into a memory controller of the processor; performing an in-memory copy in a second memory to copy a second data as an undo log, wherein the second data is an old version of the first data; and writing the redo log from the memory controller into the second memory for covering the second data by the redo log as a third data, wherein the redo log, the third data and the first data are the same.

公开(公告)号：US11526328B2

公开(公告)日：2022-12-13

申请号：US16781868

申请日：2020-02-04

Applicant: MACRONIX International Co., Ltd.

Inventor： Hung-Sheng Chang ,  Han-Wen Hu ,  Hsiang-Pang Li ,  Tzu-Hsien Yang ,  I-Ching Tseng ,  Hsiang-Yun Cheng ,  Chia-Lin Yang

IPC: G06F7/544 ,  G06N3/04 ,  G11C13/00

Abstract: A computation method and a computation apparatus exploiting weight sparsity, adapted for a processor to perform multiply-and-accumulate operations on a memory including multiple input and output lines crossing each other. In the method, weights are mapped to the cells of each operation unit (OU) in the memory. The rows of the cells of each OU are compressed by removing at least one row of the cells each mapped with a weight of 0, and an index including values each indicating a distance between every two rows of the cells including at least one cell mapped with a non-zero weight for each OU is encoded. Inputs are inputted to the input lines corresponding to the rows of each OU excluding the rows of the cells with the weight of 0 according to the index and outputs are sensed from the output lines corresponding to the OU to compute a computation result.

公开(公告)号：US20210240443A1

公开(公告)日：2021-08-05

申请号：US16781868

申请日：2020-02-04

Applicant: MACRONIX International Co., Ltd.

Inventor： Hung-Sheng Chang ,  Han-Wen Hu ,  Hsiang-Pang Li ,  Tzu-Hsien Yang ,  I-Ching Tseng ,  Hsiang-Yun Cheng ,  Chia-Lin Yang

IPC: G06F7/544 ,  G06N3/04 ,  G11C13/00

Abstract: A computation method and a computation apparatus exploiting weight sparsity, adapted for a processor to perform multiply-and-accumulate operations on a memory including multiple input and output lines crossing each other. In the method, weights are mapped to the cells of each operation unit (OU) in the memory. The rows of the cells of each OU are compressed by removing at least one row of the cells each mapped with a weight of 0, and an index including values each indicating a distance between every two rows of the cells including at least one cell mapped with a non-zero weight for each OU is encoded. Inputs are inputted to the input lines corresponding to the rows of each OU excluding the rows of the cells with the weight of 0 according to the index and outputs are sensed from the output lines corresponding to the OU to compute a computation result.