公开(公告)号：US09530784B1

公开(公告)日：2016-12-27

申请号：US14743697

申请日：2015-06-18

Applicant: MACRONIX International Co., Ltd.

Inventor： Hsiang-Yu Lai ,  Zu-Sing Yang

IPC: H01L29/792 ,  H01L27/115 ,  H01L21/28

CPC classification number: H01L27/11582 ,  H01L27/1157

Abstract: Provided is a memory device including a stack structure, a plurality of first cap layers, and a plurality of second cap layers. The stack structure is located on a substrate. The stack structure includes a plurality of first conductive layers and a plurality of dielectric layers. The first conductive layers and the dielectric layers are stacked alternately. The first cap layers are located on sidewalls of the first conductive layers respectively. The second cap layers are located on sidewalls of the dielectric layers respectively.

Abstract translation: 提供了一种包括堆叠结构，多个第一盖层和多个第二盖层的存储器件。 堆叠结构位于基板上。 堆叠结构包括多个第一导电层和多个电介质层。 第一导电层和电介质层交替堆叠。 第一盖层分别位于第一导电层的侧壁上。 第二盖层分别位于电介质层的侧壁上。

公开(公告)号：US09548369B2

公开(公告)日：2017-01-17

申请号：US14670289

申请日：2015-03-26

Applicant: MACRONIX International Co., Ltd.

Inventor： Zu-Sing Yang

IPC: H01L29/423 ,  H01L27/115

CPC classification number: H01L29/42372 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/42364

Abstract: Provided is a memory device including a substrate, a first stack structure, and a plurality of second stack structures. The substrate has a first region and a second region. The first stack structure is located on the substrate of the first region. The second stack structures are located on the substrate of the second region. A sidewall of the first stack structure and a sidewall of the second stack structure have a concave-and-convex surface respectively.

Abstract translation: 提供了一种包括基板，第一堆叠结构和多个第二堆叠结构的存储器件。 衬底具有第一区域和第二区域。 第一堆叠结构位于第一区域的基板上。 第二堆叠结构位于第二区域的基板上。 第一堆叠结构的侧壁和第二堆叠结构的侧壁分别具有凹凸表面。

公开(公告)号：US20160284808A1

公开(公告)日：2016-09-29

申请号：US14670289

申请日：2015-03-26

Applicant: MACRONIX International Co., Ltd.

Inventor： Zu-Sing Yang

IPC: H01L29/423 ,  H01L27/115

CPC classification number: H01L29/42372 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/42364

Abstract: Provided is a memory device including a substrate, a first stack structure, and a plurality of second stack structures. The substrate has a first region and a second region. The first stack structure is located on the substrate of the first region. The second stack structures are located on the substrate of the second region. A sidewall of the first stack structure and a sidewall of the second stack structure have a concave-and-convex surface respectively.

Abstract translation: 提供了一种包括基板，第一堆叠结构和多个第二堆叠结构的存储器件。 衬底具有第一区域和第二区域。 第一堆叠结构位于第一区域的基板上。 第二堆叠结构位于第二区域的基板上。 第一堆叠结构的侧壁和第二堆叠结构的侧壁分别具有凹凸表面。

公开(公告)号：US20160372480A1

公开(公告)日：2016-12-22

申请号：US14743697

申请日：2015-06-18

Applicant: MACRONIX International Co., Ltd.

Inventor： Hsiang-Yu Lai ,  Zu-Sing Yang

IPC: H01L27/115 ,  H01L21/28

CPC classification number: H01L27/11582 ,  H01L27/1157

Abstract: Provided is a memory device including a stack structure, a plurality of first cap layers, and a plurality of second cap layers. The stack structure is located on a substrate. The stack structure includes a plurality of first conductive layers and a plurality of dielectric layers. The first conductive layers and the dielectric layers are stacked alternately. The first cap layers are located on sidewalls of the first conductive layers respectively. The second cap layers are located on sidewalls of the dielectric layers respectively.

Abstract translation: 提供了一种包括堆叠结构，多个第一盖层和多个第二盖层的存储器件。 堆叠结构位于基板上。 堆叠结构包括多个第一导电层和多个电介质层。 第一导电层和电介质层交替堆叠。 第一盖层分别位于第一导电层的侧壁上。 第二盖层分别位于电介质层的侧壁上。

公开(公告)号：US20160086968A1

公开(公告)日：2016-03-24

申请号：US14490137

申请日：2014-09-18

Applicant: MACRONIX International Co., Ltd.

Inventor： Zu-Sing Yang ,  Cheng-Yi Lung

IPC: H01L27/115

CPC classification number: H01L27/11582 ,  H01L27/1157

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a plurality of stack structures, and a plurality of support layers. The stack structures are disposed on the substrate, and a trench is formed between adjacent two stack structures. Each of the stack structures includes a plurality of conductor layers and a plurality of dielectric layers. The dielectric layers and the conductor layers are disposed alternately. The support layers are disposed in the stack structures respectively.

Abstract translation: 提供半导体器件。 半导体器件包括衬底，多个堆叠结构和多个支撑层。 堆叠结构设置在衬底上，并且在相邻的两个堆叠结构之间形成沟槽。 每个堆叠结构包括多个导体层和多个电介质层。 电介质层和导体层交替设置。 支撑层分别设置在堆叠结构中。