公开(公告)号：US20220139848A1

公开(公告)日：2022-05-05

申请号：US17575789

申请日：2022-01-14

Applicant: MEDIATEK INC.

Inventor： Chia-Cheng CHANG ,  Tzu-Hung LIN ,  I-Hsuan PENG ,  Yi-Jou LIN

IPC: H01L23/00 ,  H01L23/053 ,  H01L23/367 ,  H01L23/31 ,  H01L25/16 ,  H01L23/498

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a semiconductor die disposed over the substrate, and a frame disposed over the substrate. The frame is adjacent to the semiconductor die, and an upper surface of the frame is lower than the upper surface of the semiconductor die. IN addition, a passive component is disposed on the substrate and located between the frame and the semiconductor die.

公开(公告)号：US20200168548A1

公开(公告)日：2020-05-28

申请号：US16661219

申请日：2019-10-23

Applicant: MEDIATEK INC.

Inventor： Po-Hao CHANG ,  Yi-Jou LIN ,  Hung-Chuan CHEN

IPC: H01L23/538 ,  H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L21/48

Abstract: A semiconductor package structure includes a first semiconductor die and a second semiconductor die neighboring the first semiconductor die. The first semiconductor die includes a first edge, a second edge opposite the first edge, and a first metal layer exposed from the second edge. The second semiconductor includes a third edge neighboring the second edge of the first semiconductor die, a fourth edge opposite the third edge, and a second metal layer exposed from the third edge. The first metal layer of the first semiconductor die is electrically connected to the second metal layer of the second semiconductor die.

公开(公告)号：US20220020726A1

公开(公告)日：2022-01-20

申请号：US17488921

申请日：2021-09-29

Applicant: MEDIATEK INC.

Inventor： Chia-Cheng CHANG ,  Tzu-Hung LIN ,  I-Hsuan PENG ,  Yi-Jou LIN

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

公开(公告)号：US20210159177A1

公开(公告)日：2021-05-27

申请号：US17098659

申请日：2020-11-16

Applicant: MEDIATEK INC.

Inventor： Yi-Lin TSAI ,  Yi-Jou LIN ,  I-Hsuan PENG ,  Wen-Sung HSU

IPC: H01L23/538 ,  H01L23/00

Abstract: A semiconductor package structure includes a substrate, a bridge structure, a redistribution layer, a first semiconductor component, and a second semiconductor component. The substrate has a wiring structure. The bridge structure is over the substrate. The redistribution layer is over the bridge structure. The first semiconductor component and the second semiconductor component are over the redistribution layer, wherein the first semiconductor component is electrically coupled to the second semiconductor component through the redistribution layer and the bridge structure.

公开(公告)号：US20230197684A1

公开(公告)日：2023-06-22

申请号：US18170078

申请日：2023-02-16

Applicant: MEDIATEK INC.

Inventor： Chia-Cheng CHANG ,  Tzu-Hung LIN ,  I-Hsuan PENG ,  Yi-Jou LIN

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367

CPC classification number: H01L25/0655 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/3128 ,  H01L2224/16113 ,  H01L24/16 ,  H01L23/3675 ,  H01L2224/16227 ,  H01L2924/3511

Abstract: A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

公开(公告)号：US20210313299A1

公开(公告)日：2021-10-07

申请号：US17208198

申请日：2021-03-22

Applicant: MEDIATEK INC.

Inventor： Yi-Lin TSAI ,  Wen-Sung HSU ,  I-Hsuan PENG ,  Yi-Jou LIN

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00

Abstract: A semiconductor package structure includes a substrate, a redistribution layer, a first semiconductor component, a conductive pillar, and a second semiconductor component. The redistribution layer is over the substrate. The first semiconductor component is over the redistribution layer. The conductive pillar is adjacent to the first semiconductor component, wherein the first semiconductor component and the conductive pillar are surrounded by a molding material. The second semiconductor component is over the molding material, wherein the second semiconductor component is electrically coupled to the redistribution layer through the conductive pillar.