公开(公告)号：US20230197684A1

公开(公告)日：2023-06-22

申请号：US18170078

申请日：2023-02-16

申请人： MEDIATEK INC.

发明人： Chia-Cheng CHANG ,  Tzu-Hung LIN ,  I-Hsuan PENG ,  Yi-Jou LIN

IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367

CPC分类号： H01L25/0655 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/3128 ,  H01L2224/16113 ,  H01L24/16 ,  H01L23/3675 ,  H01L2224/16227 ,  H01L2924/3511

摘要： A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

公开(公告)号：US20170179055A1

公开(公告)日：2017-06-22

申请号：US15450411

申请日：2017-03-06

申请人： MediaTek Inc.

发明人： Tzu-Hung LIN ,  Cheng-Chou HUNG

IPC分类号： H01L23/00 ,  H01L23/66

CPC分类号： H01L28/10 ,  H01L23/5227 ,  H01L23/53238 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L2223/6677 ,  H01L2224/02181 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/08123 ,  H01L2224/08265 ,  H01L2224/11019 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/4502 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/85007 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19051 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014

摘要： The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A conductive structure is disposed on the conductive pad, and a passive device is also disposed on the conductive pad, wherein the passive device has a first portion located above the second passivation layer and a second portion passing through the second passivation layer. A solderability preservative film covers the first portion of the passive device, and an under bump metallurgy (UBM) layer covers the second portion of the passive device and a portion of the conductive structure.

公开(公告)号：US20160276324A1

公开(公告)日：2016-09-22

申请号：US15014636

申请日：2016-02-03

申请人： MediaTek Inc.

发明人： Tzu-Hung LIN ,  I-Hsuan PENG ,  Ching-Wen HSIAO

IPC分类号： H01L25/16 ,  H01L23/31 ,  H01L23/522 ,  H01L23/48 ,  H01L25/065 ,  H01L23/528 ,  H01L23/00

CPC分类号： H01L25/16 ,  H01L23/3107 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/14 ,  H01L24/19 ,  H01L24/20 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/00012 ,  H01L2924/00

摘要： The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first semiconductor die. A first redistribution layer (RDL) structure is coupled to the first semiconductor die. The first redistribution layer (RDL) structure includes a first conductive trace disposed at a first layer-level. A second conductive trace is disposed at a second layer-level. A first inter-metal dielectric (IMD) layer and a second inter-metal dielectric (IMD) layer, which is beside the first inter-metal dielectric (IMD) layer, are disposed between the first conductive trace and the second conductive trace.

摘要翻译： 本发明提供一种半导体封装组件。 半导体封装组件包括包括第一半导体管芯的第一半导体封装。 第一再分配层（RDL）结构耦合到第一半导体管芯。 第一再分配层（RDL）结构包括设置在第一层级的第一导电迹线。 第二导电迹线设置在第二层级。 位于第一导电迹线和第二导电迹线之间的第一金属间电介质（IMD）层之外的第一金属间介电层（IMD）层和第二金属间介电层（IMD）层。

公开(公告)号：US20160181201A1

公开(公告)日：2016-06-23

申请号：US14963451

申请日：2015-12-09

申请人： MediaTek Inc.

发明人： Ming-Tzong YANG ,  Cheng-Chou HUNG ,  Wei-Che HUANG ,  Yu-Hua HUANG ,  Tzu-Hung LIN ,  Kuei-Ti CHAN ,  Ruey-Beei WU ,  Kai-Bin WU

IPC分类号： H01L23/538 ,  H01L25/065

CPC分类号： H01L23/5384 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5386 ,  H01L24/14 ,  H01L25/0657 ,  H01L2224/16146 ,  H01L2225/06541 ,  H01L2225/06544

摘要： The invention provides a semiconductor package assembly with a TSV interconnect. The semiconductor package assembly includes a first semiconductor die mounted on a base. The first semiconductor die includes a semiconductor substrate. A first array of TSV interconnects and a second array of TSV interconnects are formed through the semiconductor substrate, wherein the first array and second array of TSV interconnects are separated by an interval region. A first ground TSV interconnect is disposed within the interval region. A second semiconductor die is mounted on the first semiconductor die, having a ground pad thereon. The first ground TSV interconnect of the first semiconductor die has a first terminal coupled to the ground pad of the second semiconductor die and a second terminal coupled to an interconnection structure disposed on a front side of the semiconductor substrate.

摘要翻译： 本发明提供一种具有TSV互连的半导体封装组件。 半导体封装组件包括安装在基座上的第一半导体管芯。 第一半导体管芯包括半导体衬底。 通过半导体衬底形成TSV互连的第一阵列和TSV互连的第二阵列，其中TSV互连的第一阵列和第二阵列被间隔区隔开。 第一接地TSV互连设置在间隔区域内。 第二半导体管芯安装在第一半导体管芯上，其上具有接地焊盘。 第一半导体管芯的第一接地TSV互连具有耦合到第二半导体管芯的接地焊盘的第一端子和耦合到布置在半导体衬底的前侧上的互连结构的第二端子。

公开(公告)号：US20160056105A1

公开(公告)日：2016-02-25

申请号：US14932122

申请日：2015-11-04

申请人： MediaTek Inc

发明人： Kuei-Ti CHAN ,  Tzu-Hung LIN ,  Ching-Liou HUANG

IPC分类号： H01L23/528 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L23/64

CPC分类号： H01L23/528 ,  H01L23/3171 ,  H01L23/5227 ,  H01L23/525 ,  H01L23/645 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2223/6677 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11912 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/12 ,  H01L2924/1206 ,  H01Q23/00 ,  H01L2224/05552

摘要： A semiconductor package includes a substrate, a first passivation layer disposed on the substrate, and an under bump metallurgy layer disposed on the first passivation layer. An additional under bump metallurgy layer is disposed on the first passivation layer, isolated from the under bump metallurgy layer; and a conductive pillar disposed on the additional under bump metallurgy layer.

摘要翻译： 半导体封装包括衬底，设置在衬底上的第一钝化层和设置在第一钝化层上的凸块下金属层。 附加的凸块下冶金层设置在与凸块下金属层隔离的第一钝化层上; 以及设置在附加的凸块下金属层上的导电柱。

公开(公告)号：US20140377913A1

公开(公告)日：2014-12-25

申请号：US14482112

申请日：2014-09-10

申请人： MediaTek Inc.

发明人： Thomas Matthew GREGORICH ,  Andrew C. CHANG ,  Tzu-Hung LIN

IPC分类号： H01L23/00

CPC分类号： H01L24/81 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method for fabricating a molded interposer package includes performing a first anisotropic etching process to remove a portion of the metal sheet from a top surface of the metal sheet, thereby forming a plurality of first recesses in the metal sheet, forming a molding material covering the top surface, filling the first recesses, forming a plurality of first via openings in the molding material, wherein the first via openings expose the top surface, forming a plurality of first metal vias in the first via openings and a plurality of first redistribution layer patterns respectively on the first metal vias, performing a second anisotropic etching process to remove a portion of the metal sheet from a bottom surface of the metal sheet until a bottom of the molding material is exposed, and forming a solder mask layer on the molding material, leaving the first redistribution layer patterns exposed.

摘要翻译： 一种用于制造模制插入件封装的方法包括进行第一各向异性蚀刻工艺以从金属板的顶表面去除金属片的一部分，从而在金属片中形成多个第一凹槽，形成覆盖金属片的成型材料 顶表面，填充第一凹槽，在模制材料中形成多个第一通孔，其中第一通孔开口暴露顶表面，在第一通孔中形成多个第一金属通孔，以及多个第一再分配层图案 分别在第一金属通孔上，进行第二各向异性蚀刻工艺以从金属板的底表面去除金属片的一部分直到模制材料的底部暴露，并且在模制材料上形成焊接掩模层， 留下第一个重分布层图案。

公开(公告)号：US20140151867A1

公开(公告)日：2014-06-05

申请号：US14173976

申请日：2014-02-06

申请人： MediaTek Inc.

发明人： Tzu-Hung LIN ,  Wen-Sung HSU ,  Ta-Jen YU ,  Andrew C. CHANG

IPC分类号： H01L23/495

摘要： The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.

摘要翻译： 本发明提供半导体封装和用于制造用于半导体封装的基座的方法。 半导体封装包括嵌入基座中的导电迹线。 半导体器件通过导电结构安装在导电迹线上。

公开(公告)号：US20220310498A1

公开(公告)日：2022-09-29

申请号：US17838412

申请日：2022-06-13

申请人： MEDIATEK INC.

发明人： Tzu-Hung LIN ,  Yuan-Chin LIU

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

摘要： A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a first semiconductor die, and a second semiconductor die. The substrate includes a first substrate partition and a second substrate partition. The first substrate partition has a first wiring structure. The second substrate partition is adjacent to the first substrate partition and has a second wiring structure. The first substrate partition and the second substrate partition are surrounded by a first molding material. The first semiconductor die is disposed over the substrate and electrically coupled to the first wiring structure. The second semiconductor die is disposed over the substrate and electrically coupled to the second wiring structure.

公开(公告)号：US20210175137A1

公开(公告)日：2021-06-10

申请号：US17182525

申请日：2021-02-23

申请人： MEDIATEK INC.

发明人： Chia-Cheng CHANG ,  Tzu-Hung LIN ,  I-Hsuan PENG ,  Nai-Wei LIU

IPC分类号： H01L23/053 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/16 ,  H01L23/00 ,  H01L25/065 ,  H01L23/04 ,  H01L25/18 ,  H01L23/16

摘要： A semiconductor package structure including a package substrate, at least one semiconductor die, a lid structure, a first electronic component and a heat sink is provided. The package substrate has a first surface and a second surface opposite to the first surface. The semiconductor die is on the first surface of the package substrate and is surrounded by an encapsulating layer. The lid structure surrounds and is spaced apart from the encapsulating layer. The lid structure includes a first opening that is covered by the first surface of the package substrate. The first electronic component is over the first surface of the package substrate and arranged within the first opening of the lid structure. The heat sink covers the lid structure and the semiconductor die.

公开(公告)号：US20210035930A1

公开(公告)日：2021-02-04

申请号：US16910354

申请日：2020-06-24

申请人： MEDIATEK INC.

发明人： Yen-Yao CHI ,  Nai-Wei LIU ,  Tzu-Hung LIN

IPC分类号： H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01Q1/38 ,  H01Q1/22

摘要： A semiconductor package structure is provided. The semiconductor package structure includes an antenna device and semiconductor package. The antenna device includes a conductive pattern layer including a first antenna element, formed in an insulating substrate and adjacent to a first surface of the insulating substrate. The antenna device also includes a second antenna element formed on a second surface of the insulating substrate opposite the first surface. The semiconductor package includes a redistribution layer (RDL) structure bonded and electrically connected to the conductive pattern layer. The semiconductor package also includes a first semiconductor die electrically connected to the RDL structure, and an encapsulating layer formed on the RDL structure and surrounding the first semiconductor die.