公开(公告)号：US20240038614A1

公开(公告)日：2024-02-01

申请号：US18342149

申请日：2023-06-27

申请人： MEDIATEK INC.

发明人： Yi-Lin TSAI ,  Nai-Wei LIU ,  Wen-Sung HSU

IPC分类号： H01L23/31 ,  H01L25/16 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/3157 ,  H01L25/16 ,  H01L23/3107 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/182

摘要： A semiconductor package structure includes a substrate, a dummy conductive mesh structure, an interposer, an underfill material, and a semiconductor die. The substrate includes a wiring structure in dielectric layers. The dummy conductive mesh structure is embedded in the substrate and is spaced apart from the wiring structure by the dielectric layers. The interposer is disposed over the substrate. The underfill material extends between the substrate and the interposer and over the dummy conductive mesh structure. The semiconductor die is disposed over the interposer and is electrically coupled to the wiring structure through the interposer.

公开(公告)号：US20230282626A1

公开(公告)日：2023-09-07

申请号：US18163417

申请日：2023-02-02

申请人： MEDIATEK INC.

发明人： Tai-Yu CHEN ,  Bo-Jiun YANG ,  Tsung-Yu PAN ,  Yin-Fa CHEN ,  Ta-Jen YU ,  Bo-Hao MA ,  Wen-Sung HSU ,  Yao-Pang HSU

IPC分类号： H01L25/10 ,  H01L23/498 ,  H01L23/00 ,  H01L23/14

CPC分类号： H01L25/105 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/16 ,  H01L23/147 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/182 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1511 ,  H01L2924/152

摘要： A high-bandwidth package-on-package (HBPoP) structure includes a first package structure and a second package structure disposed over the first package structure. The first package structure includes a first package substrate, a semiconductor die, an interposer, and a molding material. The first package substrate is formed of a silicon and/or ceramic material. The semiconductor die is disposed over the first package substrate. The interposer is disposed over the semiconductor die and is formed of a silicon and/or ceramic material. The molding material is disposed between the first package substrate and the interposer and surrounds the semiconductor die.

公开(公告)号：US20220157732A1

公开(公告)日：2022-05-19

申请号：US17515864

申请日：2021-11-01

申请人： MEDIATEK INC.

发明人： Yi-Lin TSAI ,  Nai-Wei LIU ,  Wen-Sung HSU

IPC分类号： H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

摘要： A semiconductor package includes a first die structure, a first redistribution structure that is disposed on the first die structure, a second die structure that is disposed on the first redistribution structure, and a second redistribution structure that is disposed on the second die structure. The first die structure includes an interposer, and the interposer includes a semiconductor substrate and through-vias that penetrate through the semiconductor substrate. A first integrated circuit die is disposed in the semiconductor substrate of the interposer. The second die structure includes a second integrated circuit die that is encapsulated in an encapsulant and several conductive pillars that penetrate through the encapsulant. The first integrated circuit die is electrically connected to the second integrated circuit die through the first redistribution structure, the conductive pillars, and the second redistribution structure.

公开(公告)号：US20150264814A1

公开(公告)日：2015-09-17

申请号：US14205836

申请日：2014-03-12

申请人： MediaTek Inc.

发明人： Wen-Sung HSU ,  Ta-Jen YU

IPC分类号： H05K1/18 ,  H05K3/18 ,  H05K3/30 ,  H05K3/10 ,  H01L23/00 ,  H05K3/00

CPC分类号： H01L21/485 ,  H01F17/00 ,  H01F17/0006 ,  H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/705 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L24/17 ,  H01L25/50 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2924/12042 ,  H01L2924/1206 ,  H01L2924/1421 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/2064 ,  H05K1/165 ,  H05K1/181 ,  H05K1/183 ,  H05K3/0017 ,  H05K3/0026 ,  H05K3/0047 ,  H05K3/107 ,  H05K3/188 ,  H05K3/303 ,  H05K2201/10098 ,  H01L2924/00

摘要： The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.

摘要翻译： 本发明提供半导体封装和用于制造用于半导体封装的基座的方法。 该半导体封装包括一个基座。 底座有一个装置附着面。 射频（RF）设备嵌入在基座中。 RF设备靠近设备连接表面。

公开(公告)号：US20150145127A1

公开(公告)日：2015-05-28

申请号：US14611354

申请日：2015-02-02

申请人： MediaTek Inc.

发明人： Wen-Sung HSU ,  Tzu-Hung LIN ,  Ta-Jen YU

IPC分类号： H01L23/00 ,  H01L23/31

CPC分类号： H01L23/49811 ,  H01L21/563 ,  H01L23/3142 ,  H01L23/3171 ,  H01L23/3178 ,  H01L23/3192 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/05012 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05552 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/13012 ,  H01L2224/13015 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81385 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate. A conductive trace is disposed on the substrate. A conductive pillar bump is disposed on the conductive trace, wherein the conductive bump is coupled to a die. In another configuration, a first conductive trace is disposed on the substrate, and a second conductive trace is disposed on the substrate. In the second configuration, a conductive pillar bump disposed on the second conductive trace, connecting to a conductive bump or a metal pad of the semiconductor die. A first conductive structure is disposed between the second conductive trace and the conductive pillar bump or between the second conductive trace and the substrate, and a die is disposed over the first conductive trace.

摘要翻译： 提供半导体封装。 在一种配置中，半导体封装包括衬底。 导电迹线设置在基板上。 导电柱凸块设置在导电迹线上，其中导电凸块连接到管芯。 在另一种结构中，第一导电迹线设置在衬底上，并且第二导电迹线设置在衬底上。 在第二构造中，设置在第二导电迹线上的导电柱凸块连接到半导体管芯的导电凸块或金属焊盘。 第一导电结构设置在第二导电迹线和导电柱突起之间或第二导电迹线和衬底之间，并且管芯设置在第一导电迹线上。

公开(公告)号：US20240297120A1

公开(公告)日：2024-09-05

申请号：US18407783

申请日：2024-01-09

申请人： MEDIATEK INC.

发明人： Wei-Yu CHEN ,  Yi-Lin TSAI ,  Nai-Wei LIU ,  Shih-Chin LIN ,  Wen-Sung HSU

IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L25/16

CPC分类号： H01L23/5381 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/19011 ,  H01L2924/19106

摘要： A semiconductor package structure includes a first redistribution layer, a first semiconductor die, a second semiconductor die, a bridge structure, and a plurality of conductive bumps. The first semiconductor die and the second semiconductor die are disposed over the first redistribution layer. The bridge structure is disposed under the first redistribution layer. The first semiconductor die is electrically coupled to the second semiconductor die through the first redistribution layer and the bridge structure. The conductive bumps are disposed under the first redistribution layer and are coupled to the first redistribution layer. The bridge structure is disposed between at least two of the conductive bumps.

公开(公告)号：US20190051609A1

公开(公告)日：2019-02-14

申请号：US16163614

申请日：2018-10-18

申请人： MEDIATEK Inc.

发明人： Wen-Sung HSU ,  Tao CHENG ,  Nan-Cheng CHEN ,  Che-Ya CHOU ,  Wen-Chou WU ,  Yen-Ju LU ,  Chih-Ming HUNG ,  Wei-Hsiu HSU

IPC分类号： H01L23/538 ,  H01L25/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/14 ,  H01L23/31 ,  H01L23/498 ,  H01L23/50 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L23/00

摘要： A semiconductor package includes a first substrate, a first layer structure, a second layer structure and a first antenna layer. The first antenna layer is formed on at least one of the first layer structure and the second layer structure. The first layer structure is formed between the first substrate and the second layer structure.

公开(公告)号：US20160172334A1

公开(公告)日：2016-06-16

申请号：US14736684

申请日：2015-06-11

申请人： MediaTek Inc.

发明人： Wen-Sung HSU ,  Shih-Chin LIN ,  Andrew C. CHANG ,  Tao CHENG

IPC分类号： H01L25/065 ,  H01L23/528 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L25/0657 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49827 ,  H01L23/528 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/12105 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311

摘要： A chip package structure and a method for forming a chip package are provided. The chip package structure includes a first package which includes at least a semiconductor die, a dielectric structure surrounding the semiconductor die, and a plurality of conductive structures penetrating through the dielectric structure and surrounding the semiconductor die. The package structure also includes an interposer substrate over the first package and a plurality of conductive features in or over the interposer substrate. The package structure further includes a second package over the interposer substrate, and the first package electrically couples the second package through the conductive structures and the conductive features.

摘要翻译： 提供了芯片封装结构和芯片封装形成方法。 芯片封装结构包括第一封装，其包括至少半导体管芯，围绕半导体管芯的电介质结构，以及贯穿介电结构并围绕半导体管芯的多个导电结构。 所述封装结构还包括位于所述第一封装上的插入器衬底以及在所述插入器衬底中或之上的多个导电特征。 封装结构还包括在插入器基板上的第二封装，并且第一封装通过导电结构和导电特征将第二封装电耦合。

公开(公告)号：US20130256878A1

公开(公告)日：2013-10-03

申请号：US13835701

申请日：2013-03-15

申请人： MEDIATEK INC.

发明人： Wen-Sung HSU ,  Tzu-Hung LIN ,  Ta-Jen YU

IPC分类号： H01L23/498

CPC分类号： H01L23/49811 ,  H01L21/563 ,  H01L23/3142 ,  H01L23/3171 ,  H01L23/3178 ,  H01L23/3192 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/05012 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05552 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/13012 ,  H01L2224/13015 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81385 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

摘要： The invention provides a semiconductor package. The semiconductor package includes a semiconductor package includes a substrate having a die attach surface. A die is mounted on die attach surface of the substrate via a conductive pillar bump. The die comprises a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, wherein the length of the first edge is different from that of the second edge from a plan view.

摘要翻译： 本发明提供一种半导体封装。 半导体封装包括半导体封装，其包括具有管芯附接表面的衬底。 模具通过导电柱凸块安装在基板的芯片附着表面上。 芯片包括电耦合到导电柱凸起的金属焊盘，其中金属焊盘具有基本上垂直于第一边缘的第一边缘和第二边缘，其中第一边缘的长度与第二边缘的长度不同于 平面图。

公开(公告)号：US20240274517A1

公开(公告)日：2024-08-15

申请号：US18418419

申请日：2024-01-22

申请人： MEDIATEK INC.

发明人： Fa-Chuan CHEN ,  Ta-Jen YU ,  Bo-Jiun YANG ,  Tsung-Yu PAN ,  Tai-Yu CHEN ,  Nai-Wei LIU ,  Shih-Chin LIN ,  Wen-Sung HSU

IPC分类号： H01L23/498 ,  H01L21/28 ,  H01L23/00 ,  H01L25/065

CPC分类号： H01L23/49816 ,  H01L21/28132 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0652 ,  H01L2224/05025 ,  H01L2224/05147 ,  H01L2224/13025 ,  H01L2224/13147 ,  H01L2924/01029 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/351

摘要： A semiconductor package structure includes a first component, a bonding structure on the first component, a second component connected to the first component, and a copper connector on the second component. The bonding structure includes a copper base on the first component and copper protruding portions on the copper base. The second component is connected to the first component by bonding the copper protruding portions to the copper connector, and the copper protruding portions are in contact with the copper connector.