公开(公告)号：US20180198653A1

公开(公告)日：2018-07-12

申请号：US15726993

申请日：2017-10-06

Applicant: MEDIATEK Singapore Pte. Ltd.

Inventor： Junmin Cao ,  Hon Cheong Hor ,  Tieng Ying Choke

IPC: H04L27/152 ,  H04L1/00 ,  H04L27/38 ,  H04L27/26 ,  H04L27/00 ,  H04N7/084

CPC classification number: H04L27/152 ,  H01P1/18 ,  H03D1/22 ,  H03D2200/005 ,  H03D2200/006 ,  H04B5/0031 ,  H04L1/0003 ,  H04L7/0338 ,  H04L27/0008 ,  H04L27/066 ,  H04L27/2649 ,  H04L27/3809 ,  H04L27/3818 ,  H04L27/3881 ,  H04N7/084

Abstract: A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately π/2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.