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公开(公告)号：US20070292139A1
公开(公告)日：2007-12-20
申请号：US11659413
申请日：2005-08-02
IPC分类号： H04B10/00
CPC分类号： H03G3/3084 , H03F3/08 , H03F2200/375 , H04B10/6933
摘要： A receiving method according to the present invention adjusts a level of an output voltage signal by switching a gain to be used for converting an inputted current signal to a voltage signal, in a preamplifier. Performing offset compensation on the output voltage signal in an offset compensator, in a post amplifier. Adding a reset signal, whose polarity is made opposite to a polarity of the output voltage signal, to the output voltage signal, in the preamplifier. Detecting the reset signal having added to the output voltage signal, and resetting the offset compensator by use of the detected reset signal, in the post amplifier.
摘要翻译： 根据本发明的接收方法通过在前置放大器中切换用于将输入的电流信号转换为电压信号的增益来调节输出电压信号的电平。 在后置放大器中对偏置补偿器的输出电压信号执行偏移补偿。 将其极性与输出电压信号的极性相反的复位信号添加到前置放大器中的输出电压信号。 检测添加到输出电压信号的复位信号，并通过使用检测到的复位信号在后置放大器中复位偏移补偿器。
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公开(公告)号：US08144813B2
公开(公告)日：2012-03-27
申请号：US11659413
申请日：2005-08-02
IPC分类号： H04L25/06
CPC分类号： H03G3/3084 , H03F3/08 , H03F2200/375 , H04B10/6933
摘要： A receiving method according to the present invention adjusts a level of an output voltage signal by switching a gain to be used for converting an inputted current signal to a voltage signal, in a preamplifier. Performing offset compensation on the output voltage signal in an offset compensator, in a post amplifier. Adding a reset signal, whose polarity is made opposite to a polarity of the output voltage signal, to the output voltage signal, in the preamplifier. Detecting the reset signal having added to the output voltage signal, and resetting the offset compensator by use of the detected reset signal, in the post amplifier.
摘要翻译： 根据本发明的接收方法通过在前置放大器中切换用于将输入的电流信号转换为电压信号的增益来调节输出电压信号的电平。 在后置放大器中对偏置补偿器的输出电压信号执行偏移补偿。 将其极性与输出电压信号的极性相反的复位信号添加到前置放大器中的输出电压信号。 检测添加到输出电压信号的复位信号，并通过使用检测到的复位信号在后置放大器中复位偏移补偿器。
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公开(公告)号：US20080309407A1
公开(公告)日：2008-12-18
申请号：US11658688
申请日：2005-08-03
申请人： Makoto Nakamura , Yohtaro Umeda , Jun Endou , Yuji Akatsu , Yuuki Imsi , Masatoshi Tobayashi , Yoshikazu Urabe , Hatsushi Iizuka , Eiji Hyodo
发明人： Makoto Nakamura , Yohtaro Umeda , Jun Endou , Yuji Akatsu , Yuuki Imsi , Masatoshi Tobayashi , Yoshikazu Urabe , Hatsushi Iizuka , Eiji Hyodo
IPC分类号： H03F3/45
CPC分类号： H03G3/3084 , H03F1/08 , H03F3/087 , H03G1/0088
摘要： A gain switching determination circuit (250) compares/determines a comparative input voltage (Vc) from an inter-stage buffer (230) with a first hysteresis characteristic, and outputs a gain switching signal (SEL) based on the comparison/determination result to first and second transimpedance amplifier core circuits (210, 220), thereby switching the gains of the core circuits. This obviates holding a comparison input voltage with long response time in a level holding circuit for gain switching determination, which allows instantaneous gain switching determination and instantaneous response corresponding to burst data.
摘要翻译： 增益切换确定电路（250）将来自级间缓冲器（230）的比较输入电压（Vc）与第一滞后特性进行比较/确定，并且基于比较/确定结果将增益切换信号（SEL）输出到 第一和第二跨阻放大器核心电路（210,220），从而切换核心电路的增益。 这避免了在用于增益切换确定的电平保持电路中保持具有长响应时间的比较输入电压，这允许对应于突发数据的瞬时增益切换确定和瞬时响应。
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公开(公告)号：US07868701B2
公开(公告)日：2011-01-11
申请号：US11658688
申请日：2005-08-03
申请人： Makoto Nakamura , Yohtaro Umeda , Jun Endou , Yuji Akatsu , Yuuki Imai , Masatoshi Tobayashi , Yoshikazu Urabe , Hatsushi Iizuka , Eiji Hyodo
发明人： Makoto Nakamura , Yohtaro Umeda , Jun Endou , Yuji Akatsu , Yuuki Imai , Masatoshi Tobayashi , Yoshikazu Urabe , Hatsushi Iizuka , Eiji Hyodo
IPC分类号： H03F3/08
CPC分类号： H03G3/3084 , H03F1/08 , H03F3/087 , H03G1/0088
摘要： A gain switching determination circuit (250) compares/determines a comparative input voltage (Vc) from an inter-stage buffer (230) with a first hysteresis characteristic, and outputs a gain switching signal (SEL) based on the comparison/determination result to first and second transimpedance amplifier core circuits (210, 220), thereby switching the gains of the core circuits. This obviates holding a comparison input voltage with long response time in a level holding circuit for gain switching determination, which allows instantaneous gain switching determination and instantaneous response corresponding to burst data.
摘要翻译： 增益切换确定电路（250）将来自级间缓冲器（230）的比较输入电压（Vc）与第一滞后特性进行比较/确定，并且基于比较/确定结果将增益切换信号（SEL）输出到 第一和第二跨阻放大器核心电路（210,220），从而切换核心电路的增益。 这避免了在用于增益切换确定的电平保持电路中保持具有长响应时间的比较输入电压，这允许对应于突发数据的瞬时增益切换确定和瞬时响应。
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