公开(公告)号：US20090121225A1

公开(公告)日：2009-05-14

申请号：US11985235

申请日：2007-11-13

申请人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

发明人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

IPC分类号： H01L33/00 ,  H01L21/00

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969

摘要： One embodiment of the present invention is a thin film transistor including a gate electrode formed on an insulating substrate, a gate insulator formed on the gate electrode, a drain electrode and a source electrode formed on the gate insulator, an oxide semiconductor pattern formed between the drain electrode and the source electrode, and a sealing layer formed on the oxide semiconductor pattern.

摘要翻译： 本发明的一个实施例是一种薄膜晶体管，其包括形成在绝缘基板上的栅极电极，形成在栅电极上的栅极绝缘体，形成在栅极绝缘体上的漏电极和源电极，形成在栅绝缘体之间的氧化物半导体图案 漏电极和源电极，以及形成在氧化物半导体图案上的密封层。

公开(公告)号：US20100276692A1

公开(公告)日：2010-11-04

申请号：US12833822

申请日：2010-07-09

申请人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

发明人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969

摘要： One embodiment of the present invention is a thin film transistor having a gate electrode formed on an insulating substrate, a gate wire connected to the gate electrode, a capacitor electrode, a capacitor wire connected to the capacitor electrode, a gate insulator formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulator, a sealing layer formed on the oxide semiconductor pattern, a drain electrode and a source electrode formed on the sealing layer, a drain wire connected to the drain electrode and a pixel electrode connected to the source electrode, the drain wire and the pixel electrode being in the same layer as the drain electrode and the source electrode. wherein the gate wire, the capacitor electrode and the capacitor wire are in the same layer as the gate electrode, and wherein the sealing layer does not cover a connection part of the source electrode and a connection part of the drain electrode and wherein the drain electrode and the source electrode are connected to the oxide semiconductor pattern via the connection part of the drain electrode and the connection part of the source electrode,

摘要翻译： 本发明的一个实施例是一种薄膜晶体管，其具有形成在绝缘基板上的栅电极，连接到栅极的栅极线，电容器电极，连接到电容器电极的电容器线，形成在栅极上的栅极绝缘体 电极，形成在栅极绝缘体上的氧化物半导体图案，形成在氧化物半导体图案上的密封层，形成在密封层上的漏电极和源电极，连接到漏电极的漏极和连接到漏电极的像素电极 源电极，漏极线和像素电极处于与漏电极和源极电极相同的层中。 其中所述栅极线，所述电容器电极和所述电容器线处于与所述栅电极相同的层中，并且其中所述密封层不覆盖所述源电极的连接部分和所述漏电极的连接部分，并且其中所述漏电极 并且源电极经由漏电极的连接部分和源电极的连接部分连接到氧化物半导体图案，

公开(公告)号：US07884368B2

公开(公告)日：2011-02-08

申请号：US12833822

申请日：2010-07-09

申请人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

发明人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

IPC分类号： H01L33/00

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969

摘要： One embodiment of the present invention is a thin film transistor having a gate electrode formed on an insulating substrate, a gate wire connected to the gate electrode, a capacitor electrode, a capacitor wire connected to the capacitor electrode, a gate insulator formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulator, a sealing layer formed on the oxide semiconductor pattern, a drain electrode and a source electrode formed on the sealing layer, a drain wire connected to the drain electrode and a pixel electrode connected to the source electrode, the drain wire and the pixel electrode being in the same layer as the drain electrode and the source electrode. Wherein the gate wire, the capacitor electrode and the capacitor wire are in the same layer as the gate electrode, and wherein the sealing layer does not cover a connection part of the source electrode and a connection part of the drain electrode and wherein the drain electrode and the source electrode are connected to the oxide semiconductor pattern via the connection part of the drain electrode and the connection part of the source electrode.

摘要翻译： 本发明的一个实施例是一种薄膜晶体管，其具有形成在绝缘基板上的栅电极，连接到栅极的栅极线，电容器电极，连接到电容器电极的电容器线，形成在栅极上的栅极绝缘体 电极，形成在栅极绝缘体上的氧化物半导体图案，形成在氧化物半导体图案上的密封层，形成在密封层上的漏电极和源电极，连接到漏电极的漏极和连接到漏电极的像素电极 源电极，漏极线和像素电极处于与漏电极和源极电极相同的层中。 其中栅极线，电容器电极和电容器线与栅电极处于相同的层中，并且其中密封层不覆盖源电极的连接部分和漏电极的连接部分，并且其中漏电极 并且源电极经由漏电极的连接部分和源电极的连接部分连接到氧化物半导体图案。

公开(公告)号：US07768008B2

公开(公告)日：2010-08-03

申请号：US11985235

申请日：2007-11-13

申请人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

发明人： Mamoru Ishizaki ,  Manabu Ito ,  Masato Kon ,  Osamu Kina ,  Ryohei Matsubara

IPC分类号： H01L33/00

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969

摘要： One embodiment of the present invention is a thin film transistor including a gate electrode formed on an insulating substrate, a gate insulator formed on the gate electrode, a drain electrode and a source electrode formed on the gate insulator, an oxide semiconductor pattern formed between the drain electrode and the source electrode, and a sealing layer formed on the oxide semiconductor pattern.

摘要翻译： 本发明的一个实施例是一种薄膜晶体管，其包括形成在绝缘基板上的栅极电极，形成在栅电极上的栅极绝缘体，形成在栅极绝缘体上的漏电极和源电极，形成在栅绝缘体之间的氧化物半导体图案 漏电极和源电极，以及形成在氧化物半导体图案上的密封层。

公开(公告)号：US20070252928A1

公开(公告)日：2007-11-01

申请号：US11786494

申请日：2007-04-11

申请人： Manabu Ito ,  Norimasa Sekine ,  Mamoru Ishizaki ,  Osamu Kina ,  Ryohei Matsubara

发明人： Manabu Ito ,  Norimasa Sekine ,  Mamoru Ishizaki ,  Osamu Kina ,  Ryohei Matsubara

IPC分类号： G02F1/1335

CPC分类号： G02F1/1362 ,  G02F2001/136222

摘要： A method of manufacturing a transmission type liquid crystal display is disclosed including preparing a color filter; forming a substantially transparent semiconductor circuit on a surface of the color filter while position adjustment between the color filter and the semiconductor circuit is performed; and forming a transmission type liquid crystal display element on one side of the substantially transparent semiconductor circuit, wherein there is no color filter on the one side.

摘要翻译： 公开了一种制造透射型液晶显示器的方法，包括制备滤色器; 在滤色器和半导体电路之间进行位置调整时，在滤色器的表面上形成基本上透明的半导体电路; 并且在基本上透明的半导体电路的一侧上形成透射型液晶显示元件，其中在一侧不存在滤色器。

公开(公告)号：US08309952B2

公开(公告)日：2012-11-13

申请号：US12070944

申请日：2008-02-21

申请人： Ryohei Matsubara ,  Mamoru Ishizaki

发明人： Ryohei Matsubara ,  Mamoru Ishizaki

IPC分类号： H01L51/00

CPC分类号： H01L51/105 ,  H01L51/0022 ,  H01L51/0068 ,  H01L51/0545

摘要： One embodiment of the present invention is a thin film transistor, including: an insulating substrate; a gate electrode and a gate insulator being formed on the insulating substrate, in this order; a source electrode and a drain electrode formed on the gate insulator, surface preparation of the source electrode and the drain electrode being performed with a compound having a functional group with an electron-withdrawing property; and a semiconductor film formed on the gate insulator, the film being formed between the source electrode and the drain electrode.

摘要翻译： 本发明的一个实施例是薄膜晶体管，包括：绝缘基板; 在绝缘基板上依次形成栅电极和栅极绝缘体; 形成在栅极绝缘体上的源电极和漏电极，用具有吸电性的官能团的化合物进行源电极和漏电极的表面制备; 以及形成在所述栅极绝缘体上的半导体膜，所述膜形成在所述源电极和所述漏电极之间。

公开(公告)号：US08110858B2

公开(公告)日：2012-02-07

申请号：US12028764

申请日：2008-02-08

申请人： Ryohei Matsubara ,  Mamoru Ishizaki

发明人： Ryohei Matsubara ,  Mamoru Ishizaki

IPC分类号： H01L51/50

CPC分类号： H01L51/102 ,  H01L27/283 ,  H01L27/3244 ,  H01L51/0545

摘要： One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.

摘要翻译： 本发明的一个实施例是薄膜晶体管阵列，其具有用于多个晶体管的绝缘基板和条形半导体层，该层延伸在多个晶体管上。 本发明的另一实施例是具有一个实施例的薄膜晶体管阵列和图像显示装置的有源矩阵型显示器。

公开(公告)号：US20080197348A1

公开(公告)日：2008-08-21

申请号：US12028764

申请日：2008-02-08

申请人： Ryohei Matsubara ,  Mamoru Ishizaki

发明人： Ryohei Matsubara ,  Mamoru Ishizaki

IPC分类号： H01L51/50

CPC分类号： H01L51/102 ,  H01L27/283 ,  H01L27/3244 ,  H01L51/0545

摘要： One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.

摘要翻译： 本发明的一个实施例是薄膜晶体管阵列，其具有用于多个晶体管的绝缘基板和条形半导体层，该层延伸在多个晶体管上。 本发明的另一实施例是具有一个实施例的薄膜晶体管阵列和图像显示装置的有源矩阵型显示器。

公开(公告)号：US08502228B2

公开(公告)日：2013-08-06

申请号：US13340498

申请日：2011-12-29

申请人： Ryohei Matsubara ,  Mamoru Ishizaki

发明人： Ryohei Matsubara ,  Mamoru Ishizaki

IPC分类号： H01L27/32 ,  H01L33/08

CPC分类号： H01L51/102 ,  H01L27/283 ,  H01L27/3244 ,  H01L51/0545

摘要： One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.

摘要翻译： 本发明的一个实施例是薄膜晶体管阵列，其具有用于多个晶体管的绝缘基板和条形半导体层，该层延伸在多个晶体管上。 本发明的另一实施例是具有一个实施例的薄膜晶体管阵列和图像显示装置的有源矩阵型显示器。

公开(公告)号：US08742423B2

公开(公告)日：2014-06-03

申请号：US13232856

申请日：2011-09-14

申请人： Ryohei Matsubara ,  Mamoru Ishizaki

发明人： Ryohei Matsubara ,  Mamoru Ishizaki

IPC分类号： H01L29/04 ,  H01L29/15 ,  H01L27/14 ,  H01L29/423 ,  H01L29/786 ,  H01L29/417 ,  H01L27/12

CPC分类号： H01L29/42384 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/40 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/78618 ,  H01L29/78696

摘要： In a thin-film transistor array according to an embodiment of the present invention, thin-film transistors are disposed in a matrix array, the thin-film transistor including a gate electrode that is formed on a substrate, a gate insulating layer that is formed on the gate electrode, a source electrode that is formed on the gate insulating layer, a pixel electrode that is formed on the gate insulating layer, a drain electrode that is connected to the pixel electrode, and a semiconductor layer that is formed between the source electrode and the drain electrode, the gate electrode is connected to a gate line while the source electrode is connected to a source line, the thin-film transistor is formed within a region of the source line and the thin-film transistor array includes a stripe insulating film such that the source line and the semiconductor layer are covered with the stripe insulating film.

摘要翻译： 在根据本发明的实施例的薄膜晶体管阵列中，薄膜晶体管被设置成矩阵阵列，薄膜晶体管包括形成在基板上的栅电极，形成的栅极绝缘层 在栅电极上形成栅极绝缘层上形成的源电极，形成在栅极绝缘层上的像素电极，连接到像素电极的漏电极和形成在源极之间的半导体层 电极和漏电极，栅电极连接到栅极线，同时源电极连接到源极线，薄膜晶体管形成在源极线的区域内，薄膜晶体管阵列包括条纹 绝缘膜，使得源极线和半导体层被条状绝缘膜覆盖。