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公开(公告)号：US6088062A
公开(公告)日：2000-07-11
申请号：US958545
申请日：1997-10-27
CPC分类号： H04N7/0135 , G06F3/14 , G09G2340/0407
摘要： A picture signal processing device for performing picture signal processing such as conversion of the number of pixels or conversion processing for the number of scanning lines. The picture signal processing device includes a plurality of element processors and a controller for performing common control of said element processors. The element processors arrayed in association with pixels arrayed in one-dimensional direction of a digitized two-dimensional picture. The pixels arrayed in one-dimensional direction are chronologically sequentially entered to the element processors. Each element processor includes a transient memory for transiently storing pixel data, an input pixel data memory for storing input pixel data for transfer to the transient memory, a pixel attribute information memory for storing the pixel attribute information representing the attribute of pixels, a pixel skip information memory for storing the pixel skip information for skipping pixel data, an arithmetic-logic device for carrying out pre-set calculations using the input pixel data or pixel data of near-by element processors based on the pixel attribute information, and an output pixel data memory for storing and outputting the pixel data taken out from the transient memory. The picture signal processing device can cope with conversion processing at an optional ratio.
摘要翻译： 一种用于执行图像信号处理的图像信号处理装置，例如像素数目的转换或扫描行数的转换处理。 图像信号处理装置包括多个元件处理器和用于执行所述元件处理器的共同控制的控制器。 元素处理器与排列在数字化二维图像的一维方向上的像素相关联地排列。 在一维方向上排列的像素按时间顺序地顺序地输入到元件处理器。 每个元件处理器包括用于瞬时存储像素数据的瞬态存储器，用于存储用于传送到瞬态存储器的输入像素数据的输入像素数据存储器，用于存储表示像素属性的像素属性信息的像素属性信息存储器， 用于存储用于跳过像素数据的像素跳过信息的信息存储器，用于基于像素属性信息使用输入像素数据或近像素处理器的像素数据执行预设计算的算术逻辑装置，以及输出像素 数据存储器，用于存储和输出从瞬态存储器中取出的像素数据。 图像信号处理装置可以以任选的比例来处理转换处理。
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公开(公告)号：US06188803B1
公开(公告)日：2001-02-13
申请号：US08949606
申请日：1997-10-14
IPC分类号： G06K932
CPC分类号： G06T3/4007
摘要： The present invention relates to an image processing device for converting the number of pixels or scanning lines. In particular, the image processing device according to the present invention comprises an operator for carrying out interpolation operations and a memory for storing filter coefficient sets utilized in the interpolation operations. The memory stores filter coefficient sets each corresponding to each of the phases when the pixel interval of the original image is divided by a prescribed dividing number. Out of these filter coefficient sets, a filter coefficient set that corresponds to the phase closest to that of the pixel data to undergo interpolation operations is then outputted to the operator. The operator then carries out interpolation operations on the pixel data using these filter coefficient sets so that arbitrary format conversion becomes possible.
摘要翻译： 本发明涉及一种用于转换像素数或扫描线的图像处理装置。 特别地，根据本发明的图像处理装置包括用于执行插值操作的操作器和用于存储在插值操作中使用的滤波器系数组的存储器。 当原始图像的像素间隔除以规定的分割数时，存储器存储每个对应于每个相位的滤波器系数组。 在这些滤波器系数组中，与运算插值运算的像素数据最相近的相位的滤波器系数组输出给运算符。 然后，操作者使用这些滤波器系数组对像素数据执行插值操作，使得任意格式转换成为可能。
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公开(公告)号：US5864706A
公开(公告)日：1999-01-26
申请号：US693005
申请日：1996-08-06
CPC分类号： G06F15/7857
摘要： A digital signal processing apparatus and information processing system provide sufficient arithmetic operation performance to process high rate signals in real time and high programming performance to deal with various applications. A group of processor elements is constituted by individual processor elements each formed by disposing an arithmetic and logic unit on the bit lines of a multiport memory wherein their number is equal to or larger than the number of the data bits in a series of serial data, and the plurality of processor elements constituting the group of processor elements are uniformly controlled by controllers mounted on the same silicon chip. Consequently, the multiport memory functioning as a buffer for input data and the arithmetic and logic unit are closely joined together, so data can be communicated smoothly between them. Since the plurality of processor elements are controlled by a single controller so as to operate as a parallel computer, a digital signal processor with a high processing speed can be implemented.
摘要翻译： 数字信号处理装置和信息处理系统提供足够的算术运算性能，以实时处理高速率信号和高编程性能来处理各种应用。 一组处理器元件由各个处理器元件构成，每个处理器元件通过在多端口存储器的位线上设置算术和逻辑单元而形成，其中它们的数量等于或大于一系列串行数据中的数据位数， 并且构成处理器元件组的多个处理器元件由安装在同一硅芯片上的控制器均匀地控制。 因此，用作输入数据的缓冲器的多端口存储器和算术和逻辑单元紧密地连接在一起，因此可以在它们之间平滑地传送数据。 由于多个处理器元件由单个控制器控制以便作为并行计算机操作，因此可以实现具有高处理速度的数字信号处理器。
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公开(公告)号：US06493467B1
公开(公告)日：2002-12-10
申请号：US09125636
申请日：1999-01-08
IPC分类号： G06T500
摘要： The characteristic of nonlinear processing with respect to image data is designated by a GUI and the result of the processing quickly displayed. A personal computer 72 displays a GUI image for input on a monitor. When a user designates a nonlinear characteristic on the GUI image by an input device 70, the personal computer 72 extracts a break point approximation function indicating the nonlinear characteristic and displays the same in the GUI image. Further, the personal computer 72 generates a program for executing nonlinear processing indicated by the extracted break point approximation function by a linear array type multiple parallel processor (DSP 80) and downloads the generated program to the DSP 80.
摘要翻译： 关于图像数据的非线性处理的特征由GUI指定，处理结果快速显示。 个人计算机72在监视器上显示用于输入的GUI图像。 当用户通过输入装置70在GUI图像上指定非线性特性时，个人计算机72提取指示非线性特征的断点近似函数并将其显示在GUI图像中。 此外，个人计算机72通过线性阵列型多并行处理器（DSP80）生成用于执行由提取的断点近似函数指示的非线性处理的程序，并将生成的程序下载到DSP 80。
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公开(公告)号：US06038350A
公开(公告)日：2000-03-14
申请号：US228237
申请日：1999-01-11
IPC分类号： G06T1/20 , G06F15/80 , G06F17/10 , H04N5/14 , H04N5/46 , H04N5/926 , H04N11/00 , G06K9/36 , G06K9/54 , G06K9/60 , H04N1/40 , H04N7/12
CPC分类号： H04N5/14 , G06F17/10 , H04N5/926 , H04N11/002 , H04N5/46
摘要： A multiple parallel digital signal processor having a large number of bit processing processor elements arranged in one-dimensional array is treated as a processor block, and a plurality of the processor blocks are connected in sequence, while removing redundancy, to form a processor block column. A plurality of processor blocks are connected in sequence such that a processor block at a subsequent stage is supplied either with output of a processor block at a previous stage or with input data, and any of outputs of the processor block columns is delivered as a final output, thereby making it possible to realize a signal processing apparatus which has high performance, versatility, and simple configuration.
摘要翻译： 具有以一维阵列排列的大量位处理处理器元件的多并行数字信号处理器被视为处理器块，并且多个处理器块依次连接，同时去除冗余，以形成处理器块列 。 多个处理器块被依次连接，使得在后一级的处理器块被提供在前一级的处理器块的输出或者与输入数据一起提供，并且处理器块列的任何一个输出作为最终的 输出，从而可以实现具有高性能，多功能性和简单配置的信号处理装置。
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公开(公告)号：US6052705A
公开(公告)日：2000-04-18
申请号：US701880
申请日：1996-08-23
CPC分类号： G06F7/575 , G06F2207/3896
摘要： A digital video signal processor using parallel processing includes an input serial-access memory having memory cells in which data is inputted into successive ones of the memory cells in response to a programmed-controlled pointer and a three or more port data memory unit for writing-in data read out from the serial-access memory. An arithmetic logic unit responds to stored-program control to read out data from the data memory, perform a program-prescribed arithmetic operation, and write the result of the arithmetic operation back to the data memory. An output serial-access memory is controlled so that the arithmetic result will be outputted under program control in a sequential manner. Operation of the interconnected components is effected by a stored-program control unit connected to the input serial-access memory, the data memory, the arithmetic logic unit, and the output serial-access memory.
摘要翻译： 使用并行处理的数字视频信号处理器包括具有存储单元的输入串行存取存储器，其中响应于编程控制的指针将数据输入到存储单元的连续存储器单元中，以及三个或更多个端口数据存储单元， 在从串行存取存储器读出的数据中。 算术逻辑单元响应存储程序控制从数据存储器读出数据，执行程序规定的算术运算，并将算术运算结果写回数据存储器。 控制输出串行存取存储器，使得算术结果以顺序方式在程序控制下输出。 互连组件的操作由连接到输入串行存取存储器，数据存储器，算术逻辑单元和输出串行存取存储器的存储程序控制单元来实现。
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公开(公告)号：US5926583A
公开(公告)日：1999-07-20
申请号：US731161
申请日：1996-10-10
IPC分类号： G06T1/20 , G06F15/80 , G06F17/10 , H04N5/14 , H04N5/46 , H04N5/926 , H04N11/00 , G06K9/40 , G06K9/54 , H04N1/40 , H04N7/12
CPC分类号： H04N5/14 , G06F17/10 , H04N5/926 , H04N11/002 , H04N5/46
摘要： A multiple parallel digital signal processor having a large number of bit processing processor elements arranged in one-dimensional array is treated as a processor block, and a plurality of the processor blocks are connected in sequence, while removing redundancy, to form a processor block column. A plurality of processor blocks are connected in sequence such that a processor block at a subsequent stage is supplied either with output of a processor block at a previous stage or with input data, and an output of any of the processor blocks is delivered as a final output, thereby making it possible to realize a signal processing apparatus which has high performance, versatility, and simple configuration.
摘要翻译： 具有以一维阵列排列的大量位处理处理器元件的多并行数字信号处理器被视为处理器块，并且多个处理器块依次连接，同时去除冗余，以形成处理器块列 。 多个处理器块被依次连接，使得在后一级的处理器块被提供在先前阶段的处理器块的输出或者与输入数据一起提供，并且任何处理器块的输出作为最终的 输出，从而可以实现具有高性能，多功能性和简单配置的信号处理装置。
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公开(公告)号：US08374441B2
公开(公告)日：2013-02-12
申请号：US12400936
申请日：2009-03-10
IPC分类号： G06K9/62
摘要： An image processing device includes: a step calculator configured to calculate, as a step, a difference in pixel values of pixels in a neighborhood with respect to each pixel in an image; a classifier configured to classify the pixels into classes for areas of the steps; a boundary ratio calculator configured to calculate, as a boundary ratio, a ratio of the number of pixels at a block boundary for each of the classes; and a block noise strength determinator configured to determine, as a block noise strength of the image, the step that is larger than a predetermined threshold and that is at a class having a largest value.
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公开(公告)号：US07425990B2
公开(公告)日：2008-09-16
申请号：US10521304
申请日：2004-05-12
CPC分类号： H04N7/014 , H04N5/145 , H04N5/253 , H04N7/012 , H04N7/0132
摘要： To realize a motion compensation device capable of more appropriately compensating the movement of a video signal subjected to double-speed conversion. A motion vector between an image of a current field in a double-speed-converted video signal and an image of a reference field that is one frame or two frames later is detected, the pixels of the current field are shifted based on the motion vector and the pixels of the reference field are shifted in an opposite direction based on the motion vector. Then simple averaging or weighted average according to the shift amount is performed on the pixels of the current field and the pixels of the reference field to compensate the current field, thereby being capable of compensating the movement between fields so as to be much smoother than conventional cases.
摘要翻译： 实现能够更适当地补偿经受双速转换的视频信号的移动的运动补偿装置。 检测双速转换视频信号中的当前场的图像与一帧或两帧后的参考场的图像之间的运动矢量，基于运动矢量移位当前场的像素 并且参考场的像素基于运动矢量沿相反方向移位。 然后，对当前场的像素和参考场的像素执行根据移位量的简单平均或加权平均以补偿电流场，从而能够补偿场之间的运动，以便比常规的更平滑 案件
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公开(公告)号：US07215377B2
公开(公告)日：2007-05-08
申请号：US10498426
申请日：2002-12-13
申请人： Takaya Hoshino , Toshio Sarugaku , Ikuo Someya , Makoto Kondo , Kazuhiko Nishibori , Koji Aoyama , Yukihiko Mogi , Nobuo Ueki , Masuyoshi Kurokawa
发明人： Takaya Hoshino , Toshio Sarugaku , Ikuo Someya , Makoto Kondo , Kazuhiko Nishibori , Koji Aoyama , Yukihiko Mogi , Nobuo Ueki , Masuyoshi Kurokawa
IPC分类号： H04N7/01
CPC分类号： H04N7/0132 , H04N5/145 , H04N7/014 , Y10S348/91
摘要： The present invention provides an image signal processing apparatus and a method thereof in which each of the fields forming the unit-frame is specified, with respect to the inputted image signal, based on a difference value calculated in signal level between a detected pixel in a current field and a detected pixel at the same position in a field which comes one frame behind the current field, a motion vector for a field which comes two frames behind the current field is detected, with respect to the detected pixel in the current field, the detected pixel is shifted, with respect to the specified first field, in a direction opposite to the motion vector within the range of the detected motion vector, the detected pixel is shifted, with respect to the specified fourth field, in a direction along the motion vector, and the detected pixels is shifted, with respect to the specified second and third fields, so as to make the pixels gradually closer to the pixel position shifted with respect to the fourth field, in the consecutive order of the fields from the first field, in the direction along the motion vector or in the direction opposite to the motion vector.
摘要翻译： 本发明提供了一种图像信号处理装置及其方法，其中，基于在信号电平中计算出的信号电平中的检测像素之间的差值，相对于输入的图像信号来指定形成单位帧的每个场 当前场和位于当前场后面一帧的场中的相同位置处的检测像素，相对于当前场中的检测像素检测到在当前场后面两帧的场的运动矢量， 检测到的像素相对于规定的第一场沿与检测到的运动矢量的范围内的运动矢量相反的方向移位，检测像素相对于规定的第四场沿着沿着 运动矢量，并且检测像素相对于规定的第二和第三场移动，以使像素逐渐更接近于相对于相对移动的像素位置 以与运动矢量相反的方向沿着运动矢量的方向以第一场的场的连续顺序，以第一场为单位。
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