Stack of semiconductor chips
    2.
    发明授权
    Stack of semiconductor chips 失效
    堆叠的半导体芯片

    公开(公告)号:US07667333B2

    公开(公告)日:2010-02-23

    申请号:US11341884

    申请日:2006-01-27

    IPC分类号: H01L23/02

    摘要: A stack of semiconductor chips includes a substrate or an interposer board comprising conductor structures for electrical connection of the stack and a first chip. The first chip includes an active side with peripherally arranged bonding pads and is mounted face-up on the substrate or the interposer board. The stack beyond includes at least a further chip with peripherally arranged bonding pads on its active side. The back side and at least two chip edges of the further chip are embedded by a mold cap providing a protuberance on the back side of the chip. The protuberance forms a planar surface extending substantially parallel and with a distance to the back side of the chip. The further chip is attached face-up to the active side of the first chip by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between both chips to provide a gap there. The protuberance has at least one linear dimension that is smaller than a linear dimension of the subjacent chip.

    摘要翻译: 一堆半导体芯片包括衬底或内插器板,其包括用于电堆和第一芯片的电连接的导体结构。 第一芯片包括具有周边布置的焊盘的主动侧,并且面向上安装在基板或插入板上。 超过的堆叠包括至少另外的芯片,其活动侧上具有外围布置的焊盘。 另一芯片的背面和至少两个芯片边缘被模具盖嵌入,该模具帽在芯片的背面提供突起。 突起形成基本上平行延伸并且与芯片的背侧距离延伸的平坦表面。 通过施加在突起和第一芯片之间的粘合剂将另外的芯片面朝上连接到第一芯片的有源侧,使得突起插入两芯片之间以在其间提供间隙。 突起具有至少一个线性尺寸小于下面的芯片的线性尺寸。