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公开(公告)号：US6125426A
公开(公告)日：2000-09-26
申请号：US389060
申请日：1999-09-02
CPC分类号： G11C15/00
摘要： An associative memory device having a high speed and good performance is provided without degrading the simple design of a peripheral circuit of a conventional associative memory. The associative memory device has an N-bit first buffer and an M-bit second buffer in which W-bit data is stored through a data input port, detection device for detecting that the W-bit data is input to the first buffer k times or to the second buffer r times, a switch for alternately switching buffers in which the W-bit data is stored, and a search control for performing a search operation for a memory region by using data in the first or second buffer. By using data in the first or second buffer, during the search operation for the memory region of the associative memory, the W-bit data for the next search operation is input to the second or first buffer.
摘要翻译： 提供了具有高速度和良好性能的联想存储器件，而不降低常规关联存储器的外围电路的简单设计。 关联存储器件具有N位第一缓冲器和M位第二缓冲器，其中通过数据输入端口存储W位数据，检测装置用于检测W位数据被输入到第一缓冲器k次 或第二缓冲器r次，用于交替地切换存储有W位数据的缓冲器的开关和用于通过使用第一或第二缓冲器中的数据对存储器区域执行搜索操作的搜索控制。 通过在第一或第二缓冲器中使用数据，在关联存储器的存储器区域的搜索操作期间，用于下一个搜索操作的W位数据被输入到第二或第一缓冲器。
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公开(公告)号：US5987564A
公开(公告)日：1999-11-16
申请号：US951339
申请日：1997-10-17
CPC分类号： G11C15/00
摘要： An associative memory device having a high speed and good performance is provided without degrading the simple design of a peripheral circuit of a conventional associative memory. The associative memory device has an N-bit first buffer and an M-bit second buffer in which W-bit data is stored through a data input port, detection device for detecting that the W-bit data is input to the first buffer k times or to the second buffer r times, a switch for alternately switching buffers in which the W-bit data is stored, and a search control for performing a search operation for a memory region by using data in the first or second buffer. By using data in the first or second buffer, during the search operation for the memory region of the associative memory, the W-bit data for the next search operation is input to the second or first buffer.
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公开(公告)号：US06198741B1
公开(公告)日：2001-03-06
申请号：US08989241
申请日：1997-12-12
IPC分类号： H04L1228
CPC分类号： H04L12/4641
摘要： The invention relates to a network interface apparatus called a router or the like which is provided in a network system and relays the transmission of a data packet as a bundle of information. In order to know the permission or inhibition of communication of the data packet at a high speed while suppressing an increase in memory capacity, there is provided a coupling management table in which one VLAN ID is allocated to each terminal (each MAC address) and coupling information showing whether the communication from the terminal having a transmitting side VLAN ID to the terminal having a receiving side VLAN ID is permitted (logic “1”) or inhibited (logic “0”) has been stored at each of the coordinate points using the VLAN ID on the transmitting side and the VLAN ID on the receiving side as coordinates.
摘要翻译： 本发明涉及一种称为路由器等的网络接口装置，其被提供在网络系统中并将数据分组的传输中继为一束信息。 为了在抑制存储器容量的增加的同时高速地知道数据包的通信的允许或禁止，提供了一个耦合管理表，其中一个VLAN ID被分配给每个终端（每个MAC地址）和耦合 表示是否允许从具有发送侧VLAN ID的终端到具有接收侧VLAN ID的终端（逻辑“1”）或禁止（逻辑“0”）的通信的信息被存储在每个坐标点上 发送侧的VLAN ID和接收侧的VLAN ID作为坐标。
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公开(公告)号：US6070223A
公开(公告)日：2000-05-30
申请号：US37710
申请日：1998-03-10
申请人： Hiroshi Yoshizawa , Masato Yoneda
发明人： Hiroshi Yoshizawa , Masato Yoneda
CPC分类号： G11C15/00 , G06F17/30982 , H04L49/103 , H04L49/351 , H04L49/354
摘要： The present invention provides a network frame switch and a content addressable memory (CAM). The CAM includes a plurality of word memories which store a plurality of data pieces in such a way that those data pieces can be rewritten and registers which corresponding to the plurality of word memories respectively. The registers store information indicating whether valid target data is stored in the corresponding word memories, so that when retrieval data is input, the system retrieves word memories that store target data having a data part whose position corresponds to a prescribed first data part extracted from the input retrieval data. The CAM further includes a retrieval result correspondence write-in device which performs retrieval of word memories which store target data comprising a data part whose position corresponds to the first data part. Depending on whether any word memories are detected, the data part whose position corresponds to a second data part that is different from the first data part and which is extracted from the input retrieval data out of the target data stored in one or more word memories selected from the detected word memories, is overwritten by the same information as the second data part or the input retrieval data is written in one word memory selected from one or more word memories other than the word memory storing valid target data using the retrieval result correspondence write-in device.
摘要翻译： 本发明提供一种网络帧交换机和内容寻址存储器（CAM）。 CAM包括多个字存储器，其以这样的方式存储多个数据段，使得可以将这些数据片段重写并分别对应于多个字存储器的寄存器。 寄存器存储指示有效的目标数据是否存储在对应的字存储器中的信息，从而当输入检索数据时，系统检索存储具有数据部分的目标数据的字存储器，该数据部分的位置对应于从 输入检索数据。 CAM还包括检索结果通信写入设备，其执行存储目标数据的字存储器的检索，该目标数据包括其位置对应于第一数据部分的数据部分。 取决于是否检测到任何字存储器，其位置对应于与第一数据部分不同的第二数据部分并且从存储在选择的一个或多个字存储器中的目标数据中的输入检索数据中提取的数据部分 从检测到的字存储器中被与第二数据部分相同的信息覆盖，或者使用检索结果对应写入将输入检索数据写入从除了存储有效目标数据的字存储器之外的一个或多个字存储器中选择的一个字存储器中 在设备上
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5.发明授权Retrieving device and method, recording medium, and program for enabling a plurality of associative memories for retrieval and auto-storing 失效检索设备和方法，记录介质和用于启用多个关联存储器以用于检索和自动存储的程序公开(公告)号：US07103709B2
公开(公告)日：2006-09-05
申请号：US10829071
申请日：2004-04-21
申请人： Hiroshi Yoshizawa , Masato Yoneda
发明人： Hiroshi Yoshizawa , Masato Yoneda
CPC分类号： G11C15/00
摘要： Each CAM of a retrieving device according to the present invention has one output terminal and four input terminals. One of the four input terminals is pulled down to input a logical value 0 at all times. The other three of the input terminals are connected to output terminals of other CAMs. Prior to starting auto-store processing, each CAM recognizes a terminal that inputs an output from a CAM having a higher priority than the CAM itself on the basis of an input signal [ABCD] including initial signals and the logical value 0 from the input terminals. On the basis of a result of the recognition, each CAM performs auto-store processing. Thereby auto-store processing can be readily performed by a plurality of CAMs.
摘要翻译： 根据本发明的检索装置的每个CAM具有一个输出端和四个输入端。 四个输入端子中的一个被下拉以始终输入逻辑值0。 其他三个输入端子连接到其他CAM的输出端子。 在开始自动存储处理之前，每个CAM基于包括初始信号的输入信号[ABCD]和来自输入端的逻辑值0识别输入来自具有比CAM本身更高优先级的CAM的输出的终端 。 基于识别的结果，每个CAM执行自动存储处理。 因此，可以容易地通过多个CAM执行自动存储处理。
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公开(公告)号：US09133934B2
公开(公告)日：2015-09-15
申请号：US13823554
申请日：2011-09-20
申请人： Masato Yoneda , Hiroyuki Nagai , Masaru Hamasaki
发明人： Masato Yoneda , Hiroyuki Nagai , Masaru Hamasaki
CPC分类号： F16J15/02 , F04B39/123 , F04B39/14
摘要： A seal cap is formed of an elastically deformable material and includes a cap portion that closes a passage port, a grip portion that can be grasped, and a joining portion which integrally joins the cap portion and the grip portion. The joining portion has a bolt insertion portion through which a stud bolt can be inserted. The grip portion is formed on a side of the bolt insertion portion that corresponds to the cap portion. The joining portion is formed between the bolt insertion portion and the cap portion and is provided with a cut which communicates with the bolt insertion portion. The cut allows the cap portion to be bent and deformed by the contact between the cap portion and the stud bolt during pulling out of the seal cap from a connection portion.
摘要翻译： 密封帽由可弹性变形的材料形成，并且包括封闭通道的帽部，可以被抓握的把持部和与盖部和把持部一体地接合的接合部。 接合部具有螺栓插入部，双头螺栓可以穿过该螺栓插入部。 把持部形成在螺栓插入部的与帽部对应的一侧。 接合部形成在螺栓插入部和盖部之间，并且设置有与螺栓插入部连通的切口。 在从密封帽从连接部分拉出时，切口允许帽部通过帽部和双头螺栓之间的接触而弯曲和变形。
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7.发明授权
公开(公告)号：US5555397A
公开(公告)日：1996-09-10
申请号：US2463
申请日：1993-01-07
申请人： Hiroshi Sasama , Masato Yoneda
发明人： Hiroshi Sasama , Masato Yoneda
摘要： A priority encoder is provided with priority circuitry for sequentially producing priority-ordered output signals and encoding circuitry for encoding the output signal. Small input, small unit priority circuits are used to form the priority circuitry into a hierarchical structure. An OR output of a small unit priority circuit in a lower hierarchy is used as an input signal of another small unit priority circuit in a higher hierarchy. An output signal of the priority circuit in the higher hierarchy has an address which corresponds to the address of the one input signal and is made an enable signal of the priority circuit in the lower hierarchy. The priority encoder, though simple in structure and formed with a small number of elements, operates at a high speed. Moreover, an encoder with a prefetch circuit is built into the priority encoder provided for a CAM block. While a "hit" signal in a first priority subblock is being encoded, a hit signal in a second priority subblock can be stored in the prefetch circuit. Therefore, the encoding operation is performed without subblock-to-subblock switch time, making the encoder best suitable for a large capacity, high speed CAM.
摘要翻译： 优先编码器具有用于顺序产生优先排序的输出信号的优先电路和用于编码输出信号的编码电路。 小输入，小单元优先级电路用于将优先级电路组成层次结构。 较低层次的小单元优先电路的OR输出被用作较高级别的另一小单元优先电路的输入信号。 较高级别的优先级电路的输出信号具有对应于一个输入信号的地址的地址，并被制成低层次的优先级电路的使能信号。 优先编码器虽然结构简单，形成少量元件，但运行速度很快。 此外，具有预取电路的编码器内置在为CAM块提供的优先编码器中。 当第一优先子块中的“命中”信号被编码时，第二优先级子块中的命中信号可被存储在预取电路中。 因此，在没有子块到子块切换时间的情况下执行编码操作，使得编码器最适合于大容量，高速CAM。
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公开(公告)号：US5084636A
公开(公告)日：1992-01-28
申请号：US634326
申请日：1990-12-26
申请人： Masato Yoneda
发明人： Masato Yoneda
IPC分类号： H03K19/173
CPC分类号： H03K19/1736
摘要： In a semiconductor integrated circuit, upstream slave mode logic devices are informed successively of the completion of configuration for each slave mode logic device through a data line connected to the slave side, and a master mode logic device is finally informed of the completion of the configuration for all slave mode logic devices. Hereby, generation of a basic clock for the master mode logic device is controlled without use of a large-scaled circuit such as a pulse counter. Additionally, period of the clock supplied from said master mode logic device to each slave mode logic device is temporarily changed upon the completion of the configuration for all slave mode logic devices to inform each slave mode logic device of the completion of the configuration of all slave mode logic devices.
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公开(公告)号：US08602064B2
公开(公告)日：2013-12-10
申请号：US13366643
申请日：2012-02-06
申请人： Masato Yoneda , Hiroyuki Nagai , Atsushi Shimizu
发明人： Masato Yoneda , Hiroyuki Nagai , Atsushi Shimizu
CPC分类号： F04B39/123 , F04B51/00 , Y10T137/85986 , Y10T137/9247
摘要： A fluid passage closure system in a compressor includes a fluid passage, a seal cap unit and a flow space. The fluid passage formed in the housing of the compressor includes a large-diameter and the small-diameter passages, a step formed between the large-diameter and the small-diameter passages and a flat portion formed in the step. The large-diameter passage is formed on the opening side of the fluid passage and connected to the small-diameter passage. The seal cap unit closing the fluid passage includes a flat sealing surface and a press-contact surface. The flat sealing surface is in contact with the flat portion to close the fluid passage. The press-contact surface is formed to be pressed against the peripheral wall surface so that the seal cap unit is kept in the fluid passage. The flow space is formed between the press-contact surface and the peripheral wall surface.
摘要翻译： 压缩机中的流体通道封闭系统包括流体通道，密封盖单元和流动空间。 形成在压缩机壳体中的流体通道包括大直径和小直径通道，形成在大直径通道和小直径通道之间的台阶以及台阶形成的平坦部分。 大直径通道形成在流体通道的开口侧并连接到小直径通道。 关闭流体通道的密封盖单元包括平的密封表面和压接表面。 扁平密封表面与平坦部分接触以封闭流体通道。 压接面被形成为压靠在周壁表面上，使得密封盖单元保持在流体通道中。 流动空间形成在压接表面和周壁表面之间。
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公开(公告)号：US07782376B2
公开(公告)日：2010-08-24
申请号：US11259198
申请日：2005-10-27
申请人： Masato Yoneda , Toshio Yamada
发明人： Masato Yoneda , Toshio Yamada
CPC分类号： H04N5/2628 , H04N5/232 , H04N5/23296 , H04N5/3532 , H04N5/374
摘要： An imaging method includes a step of setting, when a digital zoom operation mode for enlarging an image imaged by a imaging part of an X-Y address type is selected, a zoom magnification and enlarging the image at the zoom magnification set. The imaging method includes the steps of: setting an imaging range in a vertical direction of the imaging part according to the zoom magnification set in the digital zoom step; outputting a driving signal for scanning the shutter signal and the readout signal to perform exposure in the imaging range set in the imaging range setting step and driving the imaging part; and discarding, when the zoom magnification is changed in the digital zoom step, images imaged by the imaging part before and after the change of the zoom magnification to prevent the images from being used.
摘要翻译： 一种成像方法包括以下步骤：当选择用于放大由X-Y地址类型的成像部分成像的图像的数字变焦操作模式时，设置变焦倍率并且以变焦倍率设置放大图像。 成像方法包括以下步骤：根据在数字变焦步骤中设定的变焦倍率来设定成像部分的垂直方向的成像范围; 输出用于扫描快门信号和读出信号的驱动信号，以在成像范围设置步骤中设置的成像范围内进行曝光并驱动成像部件; 并且当在数字变焦步骤中变焦放大率改变时，放弃在变焦倍率改变之前和之后由成像部分成像的图像，以防止使用图像。
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