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    WATER SWELLABLE POLYMER MATERIALS
    1.
    发明申请
    WATER SWELLABLE POLYMER MATERIALS 有权
    水溶性聚合物材料

    公开(公告)号：US20130087736A1

    公开(公告)日：2013-04-11

    申请号：US13513544

    申请日：2010-12-01

    申请人： Matthew P. Baker ,  Timothy W. Davey ,  Brian S. Hawkett ,  Duc N. Nguyen ,  Caitlin C. O'Brien ,  Christopher H. Such

    发明人： Matthew P. Baker ,  Timothy W. Davey ,  Brian S. Hawkett ,  Duc N. Nguyen ,  Caitlin C. O'Brien ,  Christopher H. Such

    IPC分类号： C08L13/02 ,  C09D113/02

    CPC分类号： C08L13/02 ,  B82Y30/00 ,  C01P2004/04 ,  C01P2006/60 ,  C09B67/0013 ,  C09C1/3072 ,  C09C1/3676 ,  C09C1/46 ,  C09C3/10 ,  C09D11/00 ,  C09D113/02 ,  Y10S977/734 ,  Y10T428/249953 ,  Y10T428/2998

    摘要： The invention provides a method of preparing an aqueous dispersion of polymer encapsulated particulate material, the method comprising:providing a dispersion of the particulate material in a continuous aqueous phase, the dispersion comprising RAFT agent as a stabiliser for the particulate material; and polymerising ethylenically unsaturated monomer under the control of the RAFT agent to form polymer at the surface of the dispersed particulate material, thereby providing the aqueous dispersion of polymer encapsulated particulate material; wherein polymerisation of the ethylenically unsaturated monomer comprises: (a) polymerising a monomer composition that includes ionisable ethylenically unsaturated monomer so as to form a base responsive water swellable RAFT polymer layer that encapsulates the particulate material; and (b) polymerising a monomer composition that includes non-ionisable ethylenically unsaturated monomer so as to form an extensible, water and base permeable RAFT polymer layer that encapsulates the base responsive water swellable RAFT polymer layer.

    摘要翻译： 本发明提供一种制备聚合物包封的颗粒材料的水分散体的方法，所述方法包括：提供颗粒材料在连续水相中的分散体，所述分散体包含RAFT剂作为颗粒材料的稳定剂; 并在RAFT试剂的控制下聚合烯属不饱和单体以在分散的颗粒材料的表面形成聚合物，由此提供聚合物包封的颗粒材料的水分散体; 其中所述烯属不饱和单体的聚合包括：（a）聚合包含可离子化烯键式不饱和单体的单体组合物，以形成包封所述颗粒材料的碱性响应性水溶胀性RAFT聚合物层; 和（b）聚合包含不可离子化的烯属不饱和单体的单体组合物，以便形成包封碱性响应性水可溶胀RAFT聚合物层的可延伸的水和基础可渗透的RAFT聚合物层。

    Secure design-for-test scan chains
    3.
    发明授权
    Secure design-for-test scan chains 有权
    安全的测试扫描链

    公开(公告)号：US08438436B1

    公开(公告)日：2013-05-07

    申请号：US12794221

    申请日：2010-06-04

    申请人： Matthew P. Baker ,  Weiguang Lu

    发明人： Matthew P. Baker ,  Weiguang Lu

    IPC分类号： G01R31/28

    CPC分类号： G01R31/318588

    摘要： A method of securing a design-for-test scan chain within a programmable integrated circuit device (IC) can include placing the programmable IC in an operational mode and responsive to a request to access a scan chain within the programmable IC, selectively enabling a secure mode within the programmable IC according to a configuration state of the programmable IC. Enabling secure mode within the programmable IC can provide access to the scan chain. Responsive to enabling the secure mode, the programmable IC can remain in the secure mode and be prevented from re-entering the operational mode until the programmable IC is power cycled.

    摘要翻译： 将可设计的测试扫描链固定在可编程集成电路设备（IC）内的方法可以包括将可编程IC放置在操作模式中并且响应于访问可编程IC内的扫描链的请求，选择性地实现安全 根据可编程IC的配置状态在可编程IC内的模式。 在可编程IC中启用安全模式可以提供对扫描链的访问。 响应于启用安全模式，可编程IC可以保持在安全模式并且被阻止重新进入操作模式，直到可编程IC被电力循环。

    Self-checking and self-correcting internal configuration port circuitry
    4.
    发明授权
    Self-checking and self-correcting internal configuration port circuitry 有权
    自检和自校正内部配置端口电路

    公开(公告)号：US08099625B1

    公开(公告)日：2012-01-17

    申请号：US12418522

    申请日：2009-04-03

    申请人： Chen Wei Tseng ,  Weiguang Lu ,  Matthew P. Baker

    发明人： Chen Wei Tseng ,  Weiguang Lu ,  Matthew P. Baker

    IPC分类号： G06F11/00 ,  G06F11/16

    CPC分类号： G06F11/142 ,  G06F11/2017

    摘要： Method and apparatus for self-checking and self-correcting memory states of a programmable resource is described. Programmable resource of an integrated circuit has a first core and a second core instantiated therein. A first internal configuration port and a second internal configuration port of the integrated circuit are respectively connected to the first core and the second core. The second core is coupled to the first core for monitoring operation of the first core with the second core, and the second core is configured to obtain control responsive to a failure of the first core or the first internal configuration port for a self-correcting mode.

    摘要翻译： 描述了可编程资源的自检和自校正存储器状态的方法和装置。 集成电路的可编程资源具有在其中实例化的第一核心和第二核心。 集成电路的第一内部配置端口和第二内部配置端口分别连接到第一核心和第二核心。 第二核心耦合到第一核心，用于监视具有第二核心的第一核心的操作，并且第二核心被配置为获得响应于第一核心或第一内部配置端口的故障的控制以进行自校正模式 。

    Mitigating the effect of single event transients on input/output pins of an integrated circuit device
    5.
    发明授权
    Mitigating the effect of single event transients on input/output pins of an integrated circuit device 有权
    减轻单个事件瞬变对集成电路设备的输入/输出引脚的影响

    公开(公告)号：US08384418B1

    公开(公告)日：2013-02-26

    申请号：US13071453

    申请日：2011-03-24

    申请人： Weiguang Lu ,  Matthew P. Baker

    发明人： Weiguang Lu ,  Matthew P. Baker

    IPC分类号： H03K19/003 ,  H03K19/007

    CPC分类号： H03K19/003 ,  H03K19/007

    摘要： A system for protecting an input/output (I/O) pin of an integrated circuit device (IC) from single event transients is disclosed. The system includes a first delay circuit that is configured to delay a clock signal from the clock source by a first predetermined amount of time, and a second delay circuit that is configured to delay the clock signal by a second predetermined amount of time. The system further includes a first register that is clocked by the clock signal, a second register that is clocked by the clock signal delayed by the first predetermined amount of time, and a third register that is clocked by the clock signal delayed by the second predetermined amount of time. The system also includes voter circuits, where each voter circuit is configured to receive a first data signal from an output of the first register, a second data signal from an output of the second register, and a third data signal from an output of the third register.

    摘要翻译： 公开了一种用于保护集成电路器件（IC）的输入/输出（I / O）引脚免受单事件瞬变的系统。 该系统包括：第一延迟电路，被配置为将来自时钟源的时钟信号延迟第一预定时间量;以及第二延迟电路，其被配置为将时钟信号延迟第二预定时间量。 该系统还包括由时钟信号定时的第一寄存器，由延迟了第一预定时间量的时钟信号计时的第二寄存器，以及由延迟了第二预定时间的时钟信号计时的第三寄存器 多少时间。 该系统还包括选民电路，其中每个选举电路被配置为从第一寄存器的输出接收第一数据信号，从第二寄存器的输出接收第二数据信号，并从第三数据信号输出第三数据信号 寄存器。