利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

254 条记录 (耗时 0.035 秒)

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20130056815A1

    公开(公告)日：2013-03-07

    申请号：US13420745

    申请日：2012-03-15

    申请人： Megumi ISHIDUKI ,  Masaru Kidoh ,  Mitsuru Sato ,  Masaru Kito ,  Ryota Katsumata

    发明人： Megumi ISHIDUKI ,  Masaru Kidoh ,  Mitsuru Sato ,  Masaru Kito ,  Ryota Katsumata

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7926 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/42344

    摘要： According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body; a memory film; a first channel body layer provided inside the memory film; an interlayer insulating flm provided on the first stacked body; a second stacked body having a select gate electrode layer, and a second insulating layer; a gate insulating film provided on a side wall of a second hole communicating with the first hole and penetrating the second stacked body and the interlayer insulating flm in a stacking direction of the second stacked body; and a second channel body layer provided inside the gate insulating film in the second hole. A first pore diameter of the second hole at an upper end of the select gate electrode layer is smaller than a second pore diameter of the second hole at an lower end of the select gate electrode layer.

    摘要翻译： 根据一个实施例，一种非易失性半导体存储器件包括：第一层叠体; 记忆膜; 设置在记忆膜内部的第一通道体层; 设置在第一层叠体上的层间绝缘膜; 具有选择栅电极层的第二层叠体和第二绝缘层; 栅极绝缘膜，设置在与所述第一孔连通的第二孔的侧壁上，并且在所述第二层叠体的层叠方向上贯通所述第二层叠体和所述层间绝缘膜; 以及设置在第二孔中的栅极绝缘膜内部的第二沟道体层。 选择栅电极层的上端的第二孔的第一孔径比选择栅电极层的下端的第二孔的第二孔径小。

    Nonvolatile semiconductor memory device and method for manufacturing the same
    2.
    发明授权
    Nonvolatile semiconductor memory device and method for manufacturing the same 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08786008B2

    公开(公告)日：2014-07-22

    申请号：US13420745

    申请日：2012-03-15

    申请人： Megumi Ishiduki ,  Masaru Kidoh ,  Mitsuru Sato ,  Masaru Kito ,  Ryota Katsumata

    发明人： Megumi Ishiduki ,  Masaru Kidoh ,  Mitsuru Sato ,  Masaru Kito ,  Ryota Katsumata

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L29/7926 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/42344

    摘要： According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body; a memory film; a first channel body layer provided inside the memory film; an interlayer insulating film provided on the first stacked body; a second stacked body having a select gate electrode layer, and a second insulating layer; a gate insulating film provided on a side wall of a second hole communicating with the first hole and penetrating the second stacked body and the interlayer insulating film in a stacking direction of the second stacked body; and a second channel body layer provided inside the gate insulating film in the second hole. A first pore diameter of the second hole at an upper end of the select gate electrode layer is smaller than a second pore diameter of the second hole at an lower end of the select gate electrode layer.

    摘要翻译： 根据一个实施例，一种非易失性半导体存储器件包括：第一层叠体; 记忆膜; 设置在记忆膜内部的第一通道体层; 设置在所述第一层叠体上的层间绝缘膜; 具有选择栅电极层的第二层叠体和第二绝缘层; 栅极绝缘膜，设置在与所述第一孔连通的第二孔的侧壁上，并且在所述第二层叠体的层叠方向上贯通所述第二层叠体和所述层间绝缘膜; 以及设置在第二孔中的栅极绝缘膜内部的第二沟道体层。 选择栅电极层的上端的第二孔的第一孔径比选择栅电极层的下端的第二孔的第二孔径小。

    Method for manufacturing nonvolatile semiconductor storage device and nonvolatile semiconductor storage device
    3.
    发明授权
    Method for manufacturing nonvolatile semiconductor storage device and nonvolatile semiconductor storage device 有权
    用于制造非易失性半导体存储装置和非易失性半导体存储装置的方法

    公开(公告)号：US08669608B2

    公开(公告)日：2014-03-11

    申请号：US13419984

    申请日：2012-03-14

    申请人： Mitsuru Sato ,  Megumi Ishiduki ,  Masaru Kidoh ,  Atsushi Konno ,  Yoshihiro Akutsu ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Ryota Katsumata

    发明人： Mitsuru Sato ,  Megumi Ishiduki ,  Masaru Kidoh ,  Atsushi Konno ,  Yoshihiro Akutsu ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Ryota Katsumata

    IPC分类号： H01L29/792

    CPC分类号： H01L29/7926 ,  H01L21/265 ,  H01L27/11582 ,  H01L29/0676 ,  H01L29/66833

    摘要： According to one embodiment, a method for manufacturing a nonvolatile semiconductor storage device includes; forming a first and a second stacked bodies; forming a through hole penetrating through the first stacked body, a second portion communicating with the first portion and penetrating through a select gate, and a third portion communicating with the second portion and penetrating through a second insulating layer; forming a memory film, a gate insulating film, and a channel body; forming a third insulating layer inside the channel body; forming a first embedded portion above a boundary portion inside the third portion; exposing the channel body by removing part of the first embedded portion and part of the third insulating layer in the third portion; and embedding a second embedded portion including silicon having higher impurity concentration than the first embedded portion above the first embedded portion inside the third portion.

    摘要翻译： 根据一个实施例，一种用于制造非易失性半导体存储装置的方法包括： 形成第一和第二堆叠体; 形成穿过所述第一层叠体的通孔，与所述第一部分连通并穿过选择栅极的第二部分，以及与所述第二部分连通并穿透第二绝缘层的第三部分; 形成记忆膜，栅极绝缘膜和通道体; 在通道体内形成第三绝缘层; 在第三部分内部的边界部分上方形成第一嵌入部分; 通过去除第三部分中的第一嵌入部分和第三绝缘层的一部分的一部分来暴露通道体; 以及在所述第三部分内部嵌入包含比所述第一嵌入部分上方的所述第一嵌入部分杂质浓度高的硅的第二嵌入部分。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体存储器件及其制造方法

    公开(公告)号：US20080149913A1

    公开(公告)日：2008-06-26

    申请号：US11962862

    申请日：2007-12-21

    申请人： Hiroyasu TANAKA ,  Ryota Katsumata ,  Hideaki Aochi ,  Masaru Kito ,  Masaru Kidoh ,  Mitsuru Sato

    发明人： Hiroyasu TANAKA ,  Ryota Katsumata ,  Hideaki Aochi ,  Masaru Kito ,  Masaru Kidoh ,  Mitsuru Sato

    IPC分类号： H01L27/105 ,  H01L21/8239 ,  H01L45/00

    CPC分类号： H01L27/2454 ,  G11C2213/71 ,  G11C2213/75 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/144 ,  H01L45/146

    摘要： A semiconductor memory device is disclosed, which includes a first memory cell array formed on a semiconductor substrate and composed of a plurality of memory cells stacked in layers each having a characteristic change element and a vertical type memory cell transistor connected in parallel to each other, a plurality of second memory cell arrays formed on the semiconductor substrate and having the same structure as the first memory cell array, and arranged in an X direction with respect to the first memory cell array, and a plurality of third memory cell arrays formed on the semiconductor substrate and having the same structure as the first memory cell array, and arranged in a Y direction with respect to the first memory cell array, wherein a gate voltage is applied to gates of the vertical type memory cell transistors of the first to third memory cell arrays in a same layer.

    摘要翻译： 公开了一种半导体存储器件，其包括形成在半导体衬底上的第一存储器单元阵列，并且由堆叠成各自具有彼此并联连接的特征变化元件和垂直型存储单元晶体管的多个存储单元组成， 多个第二存储单元阵列，形成在所述半导体衬底上并具有与所述第一存储单元阵列相同的结构，并且相对于所述第一存储单元阵列沿X方向布置;以及多个第三存储单元阵列， 半导体衬底并且具有与第一存储单元阵列相同的结构，并且相对于第一存储单元阵列在Y方向上布置，其中栅极电压被施加到第一至第三存储器的垂直型存储单元晶体管的栅极 单元阵列在同一层。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20110284947A1

    公开(公告)日：2011-11-24

    申请号：US13198359

    申请日：2011-08-04

    申请人： Masaru KITO ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

    发明人： Masaru KITO ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

    IPC分类号： H01L29/792

    CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11578

    摘要： A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

    摘要翻译： 提供了具有新结构的非易失性半导体存储器件，其中以三维状态层叠存储单元，从而可以减小芯片面积。 本发明的非易失性半导体存储装置是具有串联连接有多个电可编程存储单元的多个存储串的非易失性半导体存储装置。 存储器串包括柱形半导体; 形成在柱状半导体周围的第一绝缘膜; 形成在所述第一绝缘膜周围的电荷存储层; 形成在电荷存储层周围的第二绝缘膜; 并且形成在第二绝缘膜周围的第一或第n电极（n是大于1的自然数）。 存储器串的第一或第n电极和存储器串的其它第一或第n电极分别是以二维状态扩展的第一或第n导体层。

    Nonvolatile semiconductor memory device and manufacturing method thereof
    10.
    发明申请
    Nonvolatile semiconductor memory device and manufacturing method thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20070252201A1

    公开(公告)日：2007-11-01

    申请号：US11654551

    申请日：2007-01-18

    申请人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

    发明人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

    IPC分类号： H01L29/76

    CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11578

    摘要： A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

    摘要翻译： 提供了具有新结构的非易失性半导体存储器件，其中以三维状态层叠存储单元，从而可以减小芯片面积。 本发明的非易失性半导体存储装置是具有串联连接有多个电可编程存储单元的多个存储串的非易失性半导体存储装置。 存储器串包括柱形半导体; 形成在柱状半导体周围的第一绝缘膜; 形成在所述第一绝缘膜周围的电荷存储层; 形成在电荷存储层周围的第二绝缘膜; 并且形成在第二绝缘膜周围的第一或第n电极（n是大于1的自然数）。 存储器串的第一或第n电极和存储器串的其它第一或第n电极分别是以二维状态扩展的第一或第n导体层。