公开(公告)号：US10581762B2

公开(公告)日：2020-03-03

申请号：US15832806

申请日：2017-12-06

Applicant: Mellanox Technologies TLV Ltd.

Inventor： Alex Shpiner ,  Tal Anker ,  Matty Kadosh

IPC: G06F15/16 ,  H04L12/861 ,  G06F15/173 ,  H04L12/863 ,  H04L29/08

Abstract: A network switch includes switch circuitry and multiple ports. The ports are configured to communicate with a communication network. The switch circuitry is configured to receive via the ports multiple packets, which are destined to a destination network node and which specify attributes used by the destination network node as cache keys for on-demand fetching of context items into a cache memory of the destination network node, to control a rate of fetching the context items into the cache memory at the destination network node, by ordering the received packets in a sequence, based on the attributes of the respective packets, using an ordering criterion that aims to place packets that access a common context item in proximity to one another in the sequence, and to forward the received packets to the destination network node, via the ports, in accordance with the ordered sequence.

公开(公告)号：US20190173810A1

公开(公告)日：2019-06-06

申请号：US15832806

申请日：2017-12-06

Applicant: Mellanox Technologies TLV Ltd.

Inventor： Alex Shpiner ,  Tal Anker ,  Matty Kadosh

IPC: H04L12/861 ,  H04L12/863 ,  G06F15/173

Abstract: A network switch includes switch circuitry and multiple ports. The ports are configured to communicate with a communication network. The switch circuitry is configured to receive via the ports multiple packets, which are destined to a destination network node and which specify attributes used by the destination network node as cache keys for on-demand fetching of context items into a cache memory of the destination network node, to control a rate of fetching the context items into the cache memory at the destination network node, by ordering the received packets in a sequence, based on the attributes of the respective packets, using an ordering criterion that aims to place packets that access a common context item in proximity to one another in the sequence, and to forward the received packets to the destination network node, via the ports, in accordance with the ordered sequence.

公开(公告)号：US20180019947A1

公开(公告)日：2018-01-18

申请号：US15626135

申请日：2017-06-18

Applicant: MELLANOX TECHNOLOGIES TLV LTD.

Inventor： Alexander Shpiner ,  Eitan Zahavi ,  Vladimir Zdornov ,  Tal Anker ,  Matty Kadosh

IPC: H04L12/801 ,  H04L12/707 ,  H04L12/863 ,  H04L12/873

CPC classification number: H04L47/10 ,  H04L45/18 ,  H04L45/22 ,  H04L45/28 ,  H04L47/39 ,  H04L47/524 ,  H04L47/627

Abstract: A credit loop that produces a deadlock is identified in a network of switches that are interconnected for packet traffic flows therethrough. The identification is carried out by periodically transmitting respective credit loop control messages from the loop-participating switches via their deadlock-suspected egress ports to respective next-hop switches. The CLCMs has switch port-unique identifiers (SPUIDs). The loop is identified when in one of the next-hop switches the SPUID of a received CLCM is equal to the SPUID of a transmitted CLCM thereof. A master switch is selected for resolving the deadlock.