公开(公告)号：US20080009317A1

公开(公告)日：2008-01-10

申请号：US11710989

申请日：2007-02-27

申请人： Menahem Lasser ,  Eitan Mardiks

发明人： Menahem Lasser ,  Eitan Mardiks

IPC分类号： H04M1/00

CPC分类号： H04M1/274516 ,  H04M1/72522 ,  H04M2250/14 ,  H04W8/183

摘要： A SIM card comprising at least a first interface and a second interface different from the first interface is disclosed. In some embodiments, the SIM card is operative to receive data through the first interface, store the received data within the SIM card, and send back the stored data via the second interface. This enables a host operatively coupled with the SIM card to write data to the SIM card via the first interface and to read back the data via the second interface. Furthermore, a technique for extending the SIM EEPROM storage by keeping a portion of the file in flash is provided.

摘要翻译： 公开了至少包括与第一接口不同的第一接口和第二接口的SIM卡。 在一些实施例中，SIM卡可操作以通过第一接口接收数据，将接收到的数据存储在SIM卡内，并通过第二接口发回存储的数据。 这使得与SIM卡可操作地耦合的主机能够经由第一接口向SIM卡写入数据，并经由第二接口读回数据。 此外，提供了通过将文件的一部分保持在闪存中来扩展SIM EEPROM存储器的技术。

公开(公告)号：US08190206B2

公开(公告)日：2012-05-29

申请号：US11710989

申请日：2007-02-27

申请人： Menahem Lasser ,  Eitan Mardiks

发明人： Menahem Lasser ,  Eitan Mardiks

IPC分类号： H04W4/00

CPC分类号： H04M1/274516 ,  H04M1/72522 ,  H04M2250/14 ,  H04W8/183

摘要： A SIM card comprising at least a first interface and a second interface different from the first interface is disclosed. In some embodiments, the SIM card is operative to receive data through the first interface, store the received data within the SIM card, and send back the stored data via the second interface. This enables a host operatively coupled with the SIM card to write data to the SIM card via the first interface and to read back the data via the second interface. Furthermore, a technique for extending the SIM EEPROM storage by keeping a portion of the file in flash is provided.

摘要翻译： 公开了至少包括与第一接口不同的第一接口和第二接口的SIM卡。 在一些实施例中，SIM卡可操作以通过第一接口接收数据，将接收到的数据存储在SIM卡内，并通过第二接口发回存储的数据。 这使得与SIM卡可操作地耦合的主机能够经由第一接口向SIM卡写入数据，并经由第二接口读回数据。 此外，提供了通过将文件的一部分保持在闪存中来扩展SIM EEPROM存储器的技术。

公开(公告)号：US08832518B2

公开(公告)日：2014-09-09

申请号：US12034718

申请日：2008-02-21

申请人： Simon Litsyn ,  Eran Sharon ,  Idan Alrod ,  Menahem Lasser

发明人： Simon Litsyn ,  Eran Sharon ,  Idan Alrod ,  Menahem Lasser

IPC分类号： H03M13/00

CPC分类号： H03M13/2927 ,  G06F11/1068 ,  H03M13/1111 ,  H03M13/152 ,  H03M13/1545 ,  H03M13/2903 ,  H03M13/2906 ,  H03M13/3707 ,  H03M13/6362

摘要： Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. A subset whose decoding is terminated is decoded again, at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.

摘要翻译： 要编码的数据位被分割成多个子组。 每个子组被分别编码以产生相应的码字。 所选择的子集从相应的码字中移除，留下缩短的码字，并且被多对一地转换成浓缩比特。 最终码字是缩短的码字和浓缩比特的组合。 最终码字的表示被分割成选定的子集和多个剩余子集。 每个剩余子集被单独解码。 解码终止的子集至少部分地根据所选择的子集被再次解码。 如果编码和解码是系统的，则所选择的子集是奇偶校验位。

公开(公告)号：US08650462B2

公开(公告)日：2014-02-11

申请号：US12401634

申请日：2009-03-11

申请人： Simon Litsyn ,  Idan Alrod ,  Eran Sharon ,  Mark Murin ,  Menahem Lasser

发明人： Simon Litsyn ,  Idan Alrod ,  Eran Sharon ,  Mark Murin ,  Menahem Lasser

IPC分类号： G11C29/00 ,  H03M13/00

CPC分类号： H03M13/458 ,  G06F11/1012 ,  G06F11/1024 ,  G06F11/1068 ,  G06F11/1072 ,  G11C11/5642 ,  G11C2029/0409 ,  H03M13/45

摘要： Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.

摘要翻译： 根据系统或非系统ECC存储在多比特单元存储器的单元中的数据根据​​估计的概率被读取和校正（系统ECC）或恢复（非系统ECC） 更多的读取位是错误的。 在本发明的一种方法中，估计是先验的。 在本发明的另一种方法中，估计仅基于包括读位的重要性或位页的读位的方面。 在本发明的第三种方法中，估计仅基于读位的值。 并不是所有的估计是相等的。

公开(公告)号：US08443260B2

公开(公告)日：2013-05-14

申请号：US12005368

申请日：2007-12-27

申请人： Mark Shlick ,  Mark Murin ,  Menahem Lasser

发明人： Mark Shlick ,  Mark Murin ,  Menahem Lasser

IPC分类号： G11C29/42 ,  G11C29/54

CPC分类号： G06F11/1064

摘要： A method of storage and retrieval of data in a flash memory system, the flash memory system comprising a cache storage area of relatively high reliability, and a main storage area of relatively low reliability, the method comprising adding to data a level of error correction redundancy higher by a predetermined margin than that required for the cache storage area, writing the data to the cache storage area, and from the cache storage area copying the data directly to the main storage area, the predetermined margin being such as to allow subsequent error correction to compensate for errors accumulated from the cache storage area and the main storage area. In this way the memory die copy back operation can be used for copying the data from the cache to the main memory and two out of four transfers over the data bus to the flash controller are avoided.

公开(公告)号：US08433980B2

公开(公告)日：2013-04-30

申请号：US12434652

申请日：2009-05-03

申请人： Idan Alrod ,  Menahem Lasser

发明人： Idan Alrod ,  Menahem Lasser

IPC分类号： G11C29/00

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/28 ,  G11C2216/14

摘要： A memory includes cells at intersections of word lines and bit lines, word and bit line selection mechanisms and a programming mechanism. The cells on each bit line are connected in series. Cells of a word line are programmed simultaneously. For low-power reading, only some of the bit lines that intersect the word line at the programmed cells are selected and only the cells at those intersections are sensed. Another type of memory includes a physical page of cells, a sensing mechanism and a selection mechanism. Hard bits are sensed from all the cells of the physical page. Only some of those cells are selected for sensing soft bits. Another memory includes a plurality of cells, a sensing mechanism, an export mechanism and a selection mechanism. Hard and soft bits are sensed from all the cells of the plurality. Only some of the soft bits are selected for export.

摘要翻译： 存储器包括在字线和位线的交点处的单元，字和位线选择机构以及编程机制。 每个位线上的单元串联连接。 字线的单元格同时编程。 对于低功率读取，仅选择与编程单元处的字线相交的一些位线，并且仅检测那些相交处的单元。 另一种类型的存储器包括单元的物理页面，感测机构和选择机构。 从物理页面的所有单元格感测硬比特。 仅选择这些单元中的一些用于感测软位。 另一存储器包括多个单元，感测机构，输出机构和选择机构。 从多个单元中的所有单元检测硬和软比特。 只有一些软位被选择用于导出。

公开(公告)号：US08407399B2

公开(公告)日：2013-03-26

申请号：US12260135

申请日：2008-10-29

申请人： Menahem Lasser ,  Itshak Afriat ,  Opher Lieber

发明人： Menahem Lasser ,  Itshak Afriat ,  Opher Lieber

IPC分类号： G06F12/08

CPC分类号： G06F12/0246 ,  G06F12/0888 ,  G06F2212/7208

摘要： Methods, apparatus and computer medium for enforcing one or more cache management policies are disclosed herein. In some embodiments, a flash memory of a storage device includes a plurality of flash memory dies each flash memory die including a respective cache storage area and a respective main storage area. A determination is made, for data that is received from an external host device to which main storage area the received data is addressed thereby specifying one of the plurality of flash memory dies as a target die for the received data. Whenever the received data is written into a cache storage area before being written into a main storage area, the received data is written into the cache storage area of the specified target die.

摘要翻译： 本文公开了用于执行一个或多个缓存管理策略的方法，装置和计算机介质。 在一些实施例中，存储设备的闪速存储器包括多个闪速存储器管芯，每个闪速存储器管芯包括相应的缓存存储区域和相应的主存储区域。 对于从接收到的数据被存储到主存储区域的外部主机设备接收的数据进行确定，从而将多个闪速存储器管芯之一指定为接收数据的目标管芯。 无论何时在被写入主存储区域之前将接收的数据写入高速缓存存储区域中，将接收的数据写入指定目标管芯的高速缓存存储区域中。

公开(公告)号：US08332574B2

公开(公告)日：2012-12-11

申请号：US12102063

申请日：2008-04-14

申请人： Menahem Lasser ,  Mark Murin

发明人： Menahem Lasser ,  Mark Murin

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/7207

摘要： User data are stored in a memory that includes one or more blocks of pages by, for one of the blocks, and optionally for all of the blocks, whenever writing any of the user data to that block, writing the block according to a predefined plan for specifying, with respect to each page of that block, a portion of the user data that is to be written to that page. Alternatively or additionally, each page that stores user data has associated therewith a metadatum related to the age of the user data stored therein; and, for one of the blocks, at any time that two or more of the pages of that block store user data, a common value of the metadatum is associated with all such pages.

摘要翻译： 每当将任何用户数据写入该块时，将用户数据存储在包括一个或多个块的块的存储器中，并且可选地针对所有块，并根据预定义的计划写入块 用于针对该块的每个页面指定要写入该页面的用户数据的一部分。 或者或另外，存储用户数据的每个页面与其相关联地存储与其中存储的用户数据的年龄有关的元数据; 并且对于其中一个块，在该块的两个或多个页面存储用户数据的任何时间，元数据的公共值与所有这些页面相关联。

公开(公告)号：US20120243654A1

公开(公告)日：2012-09-27

申请号：US13488399

申请日：2012-06-04

申请人： Dov Moran ,  Avi Klein ,  Itzhak Pomerantz ,  Menahem Lasser ,  Eyal Bychkov ,  Eran Leibinger ,  Avraham Meir

发明人： Dov Moran ,  Avi Klein ,  Itzhak Pomerantz ,  Menahem Lasser ,  Eyal Bychkov ,  Eran Leibinger ,  Avraham Meir

IPC分类号： G06M15/00

CPC分类号： B65B57/20 ,  G06C1/00 ,  G11C11/5621 ,  G11C2216/08

摘要： A method executed by a circuit for counting electrons in storage cells in an array of at least two storage cells is provided. The method includes providing a storage array of at least two storage cells, and each of said at least two storage cells containing an unknown amount of electrons. A receiving array of at least two receiving cells is provided, where said at least two receiving cells initially contain no electrons. Then, extracting a layer of said electrons from said storage array of cells and inserting said layer into corresponding locations in said receiving array. The method then repeats said steps of extracting and inserting while at least one of said at least two storage cells is not empty. The method counts, for each said storage cell in said storage array, a productive-extraction amount.

摘要翻译： 提供了一种由至少两个存储单元的阵列中的存储单元中的电子计数电路执行的方法。 该方法包括提供至少两个存储单元的存储阵列，并且每个所述至少两个存储单元包含未知量的电子。 提供了至少两个接收单元的接收阵列，其中所述至少两个接收单元最初不包含电子。 然后，从所述单元的存储阵列提取所述电子层，并将所述层插入所述接收阵列中的对应位置。 该方法然后重复所述提取和插入步骤，而所述至少两个存储单元中的至少一个不是空的。 对于所述存储阵列中的每个所述存储单元，该方法计数生产提取量。

公开(公告)号：US08266365B2

公开(公告)日：2012-09-11

申请号：US12316924

申请日：2008-12-17

申请人： Menahem Lasser

发明人： Menahem Lasser

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1032

摘要： A non-volatile storage device with built-in ruggedized features is disclosed. The device processes a write command to a logical block address by writing the data from the command to a non-volatile memory within the non-volatile storage device and conditionally associating the data received from the command with its corresponding logical block address. Two or more received write commands define a set of commands associated with an atomic transaction. When an end of set command is received, the device unconditionally associates the received data with each write command with its corresponding logical block address. If a power loss interrupts the reception of a set of commands, the non-volatile storage device may recover the last consistent data state before the atomic transaction was started. A write command transaction identifier allows the device to associate the command with a thread of commands that define an atomic transaction in a multithreaded system.

摘要翻译： 公开了一种具有内置加固功能的非易失性存储设备。 该设备通过将命令中的数据写入非易失性存储设备内的非易失性存储器并且将从命令接收到的数据与其对应的逻辑块地址有条件地相关联来处理对逻辑块地址的写入命令。 两个或多个接收的写入命令定义与原子事务相关联的一组命令。 当接收到设置命令的结束时，设备无条件地将接收的数据与每个写入命令及其对应的逻辑块地址相关联。 如果功率损耗中断了一组命令的接收，则非易失性存储设备可以在原子事务开始之前恢复最后一致的数据状态。 写命令事务标识符允许设备将命令与在多线程系统中定义原子事务的命令线程相关联。