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公开(公告)号：US09015376B2
公开(公告)日：2015-04-21
申请号：US13459212
申请日：2012-04-29
CPC分类号： G06F9/546 , G06F2209/548
摘要： A low overhead method to handle inter process and peer to peer communication. A queue manager is used to create a list of messages with minimal configuration overhead. A hardware queue can be connected to another software task owned by the same core or a different processor core, or connected to a hardware DMA peripheral. There is no limitation on how many messages can be queued between the producer and consumer cores. The low latency interrupt generation to the processor cores is handled by an accumulator inside the QMSS which can be configured to generate interrupts based on a programmable threshold of descriptors in a queue. The accumulator thus removes the polling overhead from software and boosts performance by doing the descriptor pops and message transfer in the background.
摘要翻译： 一种低开销的处理流程和对等通信的方法。 队列管理器用于以最少的配置开销创建消息列表。 硬件队列可以连接到由同一核心或不同处理器内核拥有的另一个软件任务，或连接到硬件DMA外设。 在生产者和消费者核心之间排队的邮件数量没有限制。 处理器内核的低延迟中断产生由QMSS内的累加器来处理，该累加器可以配置为基于队列中描述符的可编程阈值产生中断。 因此，累加器消除了软件的轮询开销，并通过在后台执行描述符弹出和消息传输来提高性能。
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公开(公告)号：US20130290984A1
公开(公告)日：2013-10-31
申请号：US13459212
申请日：2012-04-29
IPC分类号： G06F9/46
CPC分类号： G06F9/546 , G06F2209/548
摘要： A low overhead method to handle inter process and peer to peer communication. A queue manager is used to create a list of messages with minimal configuration overhead. A hardware queue can be connected to another software task owned by the same core or a different processor core, or connected to a hardware DMA peripheral. There is no limitation on how many messages can be queued between the producer and consumer cores. The low latency interrupt generation to the processor cores is handled by an accumulator inside the QMSS which can be configured to generate interrupts based on a programmable threshold of descriptors in a queue. The accumulator thus removes the polling overhead from software and boosts performance by doing the descriptor pops and message transfer in the background.
摘要翻译： 一种低开销的处理流程和对等通信的方法。 队列管理器用于以最少的配置开销创建消息列表。 硬件队列可以连接到由同一核心或不同处理器内核拥有的另一个软件任务，或连接到硬件DMA外设。 在生产者和消费者核心之间排队的邮件数量没有限制。 处理器内核的低延迟中断产生由QMSS内的累加器来处理，该累加器可以配置为基于队列中描述符的可编程阈值产生中断。 因此，累加器消除了软件的轮询开销，并通过在后台执行描述符弹出和消息传输来提高性能。
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公开(公告)号：US20130054852A1
公开(公告)日：2013-02-28
申请号：US13216572
申请日：2011-08-24
申请人： Charles Fuoco , Akila Subramaniam
发明人： Charles Fuoco , Akila Subramaniam
IPC分类号： G06F13/00
CPC分类号： G06F9/524 , G06F13/4022
摘要： Transaction requests in an interconnect fabric in a system with multiple nodes are managed in a manner that prevents deadlocks. One or more patterns of transaction requests from a master device to various slave devices within the multiple nodes that may cause a deadlock are determined. While the system is in operation, an occurrence of one of the patterns is detected by observing a sequence of transaction requests from the master device. A transaction request in the detected pattern is stalled to allow an earlier transaction request to complete in order to prevent a deadlock.
摘要翻译： 具有多个节点的系统中的互连结构中的事务请求以防止死锁的方式进行管理。 确定从主设备到可能导致死锁的多个节点内的各种从设备的事务请求的一种或多种模式。 当系统运行时，通过观察来自主设备的事务请求的顺序来检测其中一个模式的发生。 检测到的模式中的事务请求被停止以允许较早的事务请求完成以防止死锁。
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4.发明申请Method and System for Monitoring and Debugging Access to a Bus Slave Using One or More Throughput Counters 审中-公开使用一个或多个吞吐量计数器监视和调试访问总线从站的方法和系统公开(公告)号：US20120226839A1
公开(公告)日：2012-09-06
申请号：US13347736
申请日：2012-01-11
IPC分类号： G06F13/20
CPC分类号： G06F11/3636 , G06F11/348 , G06F11/349 , G06F2201/86
摘要： A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. Bus transactions to a selected slave are monitored to determine possible conflicts when multiple masters may be addressing the slave. Users are alerted to timing problems as they occur, and bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, by a selected address range or alternatively by external trigger events.
摘要翻译： 总线监控和调试系统独立运行，不会影响CPU的正常运行，并且不会对正在监视的应用程序造成任何开销。 监视到所选从站的总线事务，以确定当多个主站可能寻址从站时可能的冲突。 用户在发生定时问题时收到警报，并自动捕获与提供系统操作的洞察相关的总线统计信息。 当滑动时间窗口到期时，可以通过选定的地址范围或外部触发事件来启用或禁用相关事件的记录。
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公开(公告)号：US20120226837A1
公开(公告)日：2012-09-06
申请号：US13329261
申请日：2011-12-17
申请人： Brian Cruickshank , David Quintin Bell , Samuel Paul Visalli , Chunhua Hu , Akila Subramaniam , Charles Fuoco
发明人： Brian Cruickshank , David Quintin Bell , Samuel Paul Visalli , Chunhua Hu , Akila Subramaniam , Charles Fuoco
IPC分类号： G06F13/00
CPC分类号： G06F11/3632 , G06F11/349 , G06F11/3636 , G06F11/3648
摘要： A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. Users are alerted to timing problems as they occur, and bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.
摘要翻译： 总线监控和调试系统独立运行，不会影响CPU的正常运行，并且不会对正在监视的应用程序造成任何开销。 用户在发生定时问题时收到警报，并自动捕获与提供系统操作的洞察相关的总线统计信息。 当滑动时间窗口到期时，或者通过外部触发事件，可以启用或禁用相关事件的记录。
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公开(公告)号：US08706937B2
公开(公告)日：2014-04-22
申请号：US13329261
申请日：2011-12-17
申请人： Brian Cruickshank , David Quintin Bell , Samuel Paul Visalli , Chunhua Hu , Akila Subramaniam , Charles Fuoco
发明人： Brian Cruickshank , David Quintin Bell , Samuel Paul Visalli , Chunhua Hu , Akila Subramaniam , Charles Fuoco
IPC分类号： G06F13/00
CPC分类号： G06F11/3632 , G06F11/349 , G06F11/3636 , G06F11/3648
摘要： A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. Users are alerted to timing problems as they occur, and bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.
摘要翻译： 总线监控和调试系统独立运行，不会影响CPU的正常运行，并且不会对正在监视的应用程序造成任何开销。 用户在发生定时问题时收到警报，并自动捕获与提供系统操作的洞察相关的总线统计信息。 当滑动时间窗口到期时，或者通过外部触发事件，可以启用或禁用相关事件的记录。
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公开(公告)号：US20060187966A1
公开(公告)日：2006-08-24
申请号：US11064477
申请日：2005-02-23
申请人： Wai-Bor Leung , Barry Britton , Akila Subramaniam
发明人： Wai-Bor Leung , Barry Britton , Akila Subramaniam
IPC分类号： H04J3/06
CPC分类号： H04L25/14
摘要： A channel-alignment circuit has a controller and a plurality of channel-alignment blocks. Each channel-alignment block synchronizes two or more channels. The controller coordinates the synchronization of channels by the blocks such that (i) channels in each of one or more groups of two or more blocks are synchronized, and (ii) each group of blocks is synchronized independently of any other group.
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公开(公告)号：US10565778B2
公开(公告)日：2020-02-18
申请号：US15682777
申请日：2017-08-22
申请人： Manish Goel , Akila Subramaniam , Rahul Rithe , Seok-Jun Lee
发明人： Manish Goel , Akila Subramaniam , Rahul Rithe , Seok-Jun Lee
摘要： A method of implementing memory transfers for image warping in an electronic device is described. The method comprises receiving an input tile associated with an image; generating a geometric boundary around pixels of the input tile; and remapping the pixels in the geometric boundary to an output tile. An electronic device and a non-transitory computer readable storage medium for performing the method are also disclosed.
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公开(公告)号：US20170309306A1
公开(公告)日：2017-10-26
申请号：US15135878
申请日：2016-04-22
CPC分类号： H04N21/00 , H04N19/00 , H04N19/174 , H04N19/423
摘要： A method of enabling processing of a video stream is described. The method comprises establishing a slice width for frames of the video stream; receiving the video stream; dividing, for each frame of the video stream, the frame into vertical slices having the slice width; storing a frame of the video stream in a re-ordered slice based format. Computer-readable storage medium and a device for enabling processing of a video stream are also described
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公开(公告)号：US07532646B2
公开(公告)日：2009-05-12
申请号：US11064477
申请日：2005-02-23
申请人： Wai-Bor Leung , Barry Britton , Akila Subramaniam
发明人： Wai-Bor Leung , Barry Britton , Akila Subramaniam
CPC分类号： H04L25/14
摘要： A channel-alignment circuit has a controller and a plurality of channel-alignment blocks. Each channel-alignment block synchronizes two or more channels. The controller coordinates the synchronization of channels by the blocks such that (i) channels in each of one or more groups of two or more blocks are synchronized, and (ii) each group of blocks is synchronized independently of any other group.
摘要翻译： 通道对准电路具有控制器和多个通道对准块。 每个通道对齐块同步两个或更多个通道。 控制器通过块协调通道的同步，使得（i）两个或更多个块的一个或多个组中的每一个中的信道被同步，并且（ii）每组块独立于任何其他组同步。
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